BUK9MJJ-65PLL NXP Semiconductors, BUK9MJJ-65PLL Datasheet - Page 9
![Dual N-channel enhancement mode field-effect power transistor in SO20](/photos/41/52/415222/sot163-1_3d_sml.gif)
BUK9MJJ-65PLL
Manufacturer Part Number
BUK9MJJ-65PLL
Description
Dual N-channel enhancement mode field-effect power transistor in SO20
Manufacturer
NXP Semiconductors
Datasheet
1.BUK9MJJ-65PLL.pdf
(16 pages)
NXP Semiconductors
BUK9MJJ-65PLL
Product data sheet
Fig 11. Output characteristics: drain current as a
Fig 13. Sub-threshold drain current as a function of
(A)
(A)
I
I
10
10
10
10
10
10
D
D
160
120
80
40
−1
−2
−3
−4
−5
−6
0
function of drain-source voltage; typical values,
FET1 and FET2
gate-source voltage.
0
0
2
1
min
4
typ
6
2
max
V
GS
V
All information provided in this document is subject to legal disclaimers.
8
GS
(V) = 2.5
4.5
3.5
V
001aal627
10
001aal621
5
4
3
DS
(V)
(V)
10
3
Rev. 03 — 15 July 2010
Fig 12. Transfer characteristics; drain current as a
Fig 14. Gate-source threshold voltage as a function of
V
GS(th)
(A)
(V)
I
D
2.5
2.0
1.5
1.0
0.5
60
45
30
15
0
0
−60
function of gate-source voltage
junction temperature.
0
Dual TrenchPLUS FET Logic Level FET
T
1
j
= 150 °C
0
BUK9MJJ-65PLL
2
T
60
j
= 25 °C
max
min
typ
3
120
© NXP B.V. 2010. All rights reserved.
4
001aam029
T
V
001aal788
j
GS
(°C)
(V)
180
5
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