LPC3130_3131 NXP Semiconductors, LPC3130_3131 Datasheet - Page 58

The NXP LPC3130/3131 combine an 180 MHz ARM926EJ-S CPU core, high-speed USB2

LPC3130_3131

Manufacturer Part Number
LPC3130_3131
Description
The NXP LPC3130/3131 combine an 180 MHz ARM926EJ-S CPU core, high-speed USB2
Manufacturer
NXP Semiconductors
Datasheet
NXP Semiconductors
Table 24.
T
[1]
[2]
[3]
LPC3130_3131_1
Preliminary data sheet
Symbol
f
t
t
t
t
t
t
t
t
t
t
SCL
f(o)
r
f
BUF
LOW
HD;STA
HIGH
SU;DAT
SU;STA
SU;STO
amb
Parameters are valid over operating temperature range unless otherwise specified.
Typical ratings are not guaranteed. The values listed are at room temperature (25 C), nominal supply voltages.
Bus capacitance C
= 40 C to +85 C.
Dynamic characteristics: I
9.8 I
Parameter
SCL clock frequency
output fall time
rise time
fall time
bus free time between a STOP and
START condition
LOW period of the SCL clock
hold time (repeated) START
condition
HIGH period of the SCL clock
data set-up time
set-up time for a repeated START
condition
set-up time for STOP condition
b
in pF, from 10 pF to 400 pF.
[1]
2
Fig 26. I
I2SRX_DATA0 or
C-bus interface
I2SRX_BCK0 or
I2SRX_WS0 or
I2SRX_DATA1
I2SRX_BCK1
I2SRX_WS1
2
S-bus timing (input)
2
C-bus interface pins
Rev. 1 — 9 February 2009
t
Conditions
Standard mode
Fast mode
V
Standard mode
Fast mode
Standard mode
Fast mode
-
Standard mode
Fast mode
-
Standard mode
Fast mode
Standard mode
Fast mode
-
Standard mode
Fast mode
WH
IH
to V
Low-cost, low-power ARM926EJ-S microcontrollers
T
cy(clk)
IL
t
WL
t
su(D)
t
su(D)
Min
0
0
20 + 0.1
<tbd>
20 + 0.1
<tbd>
20 + 0.1
<tbd>
4.7
1.3
<tbd>
4.0
0.6
250
100
<tbd>
4.0
0.6
t
t
h(D)
h(D)
C
C
C
b
b
b
[3]
[3]
[3]
LPC3130/3131
Typ
<tbd>
<tbd>
-
<tbd>
<tbd>
<tbd>
<tbd>
<tbd>
<tbd>
<tbd>
<tbd>
<tbd>
<tbd>
<tbd>
<tbd>
<tbd>
<tbd>
<tbd>
t
f
[2]
© NXP B.V. 2009. All rights reserved.
Max
100
400
-
1000
300
300
300
<tbd>
<tbd>
<tbd>
<tbd>
<tbd>
<tbd>
<tbd>
<tbd>
<tbd>
<tbd>
<tbd>
t
r
002aae362
58 of 68
Unit
kHz
kHz
ns
ns
ns
ns
ns
ns
ns
s
s
s
s
s
s

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