LPC3130_3131 NXP Semiconductors, LPC3130_3131 Datasheet - Page 52

The NXP LPC3130/3131 combine an 180 MHz ARM926EJ-S CPU core, high-speed USB2

LPC3130_3131

Manufacturer Part Number
LPC3130_3131
Description
The NXP LPC3130/3131 combine an 180 MHz ARM926EJ-S CPU core, high-speed USB2
Manufacturer
NXP Semiconductors
Datasheet
NXP Semiconductors
LPC3130_3131_1
Preliminary data sheet
9.4 NAND flash memory controller
Table 19.
T
[1]
[2]
Symbol
t
t
t
t
t
t
t
t
t
t
REH
RP
WH
WP
CLS
CLH
ALS
ALH
CS
CH
amb
Fig 19.
T
See registers NandTiming1 and NandTiming2 in the LPC3130/3131 user manual .
= 40 C to +85 C, unless otherwise specified.
HCLK
= 1/NANDFLASH_NAND_CLK, see LPC3130/3131 user manual .
NAND flash controller write and read timing
Dynamic characteristics of the NAND flash memory controller
Parameter
RE HIGH hold time
RE pulse width
WE HIGH hold time
WE pulse width
CLE set-up time
CLE hold time
ALE set-up time
ALE hold time
CE set-up time
CE hold time
EBI_DQM_0_NOE
EBI_A_1_CLE
EBI_A_0_ALE
mNAND_NCS
EBI_NWE
Rev. 1 — 9 February 2009
t
ALS
t
CLS
Low-cost, low-power ARM926EJ-S microcontrollers
t
CS
t
WP
[1][2]
[1][2]
[1][2]
[1][2]
[1][2]
[1][2]
[1][2]
[1][2]
[1][2]
[1][2]
t
WH
t
CLH
Typical
T
T
T
T
T
T
T
T
T
T
HCLK
HCLK
HCLK
HCLK
HCLK
HCLK
HCLK
HCLK
HCLK
HCLK
t
ALH
x (TREH+1)
x (TRP + 1)
x (TWH + 1)
x (TWP + 1)
x (TCLS + 1)
x (TCLH + 1)
x (TALS + 1)
x (TALH + 1)
x (TCS + 1)
x (TCH + 1)
t
RP
LPC3130/3131
t
REH
002aae353
t
CH
© NXP B.V. 2009. All rights reserved.
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Unit
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