LPC3130_3131 NXP Semiconductors, LPC3130_3131 Datasheet - Page 49
LPC3130_3131
Manufacturer Part Number
LPC3130_3131
Description
The NXP LPC3130/3131 combine an 180 MHz ARM926EJ-S CPU core, high-speed USB2
Manufacturer
NXP Semiconductors
Datasheet
1.LPC3130_3131.pdf
(68 pages)
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NXP Semiconductors
Table 18.
T
[1]
[2]
[3]
LPC3130_3131_1
Preliminary data sheet
Symbol Parameter
f
T
t
t
t
t
t
t
t
t
t
t
t
oper
CLCX
CHCX
d(o)
h(o)
d(AV)
h(A)
d(QV)
h(Q)
su(D)
h(D)
QZ
amb
CLCL
Parameters are valid over operating temperature range unless otherwise specified.
All values valid for pads set to high slew rate. VDDE_IOA = VDDE_IOB = 1.8
f
oper
= 40 C to +85 C, unless otherwise specified; V
= 1/T
operating frequency
clock cycle time
clock LOW time
clock HIGH time
output delay time
output hold time
address valid delay
time
address hold time
data output valid
delay time
data output hold time
data input set-up
time
data input hold time
data output
high-impedance time
Dynamic characteristics of SDR SDRAM memory interface
CLCL
9.3 SDRAM controller
Conditions
on pin EBI_CKE
on pins
EBI_NRAS_BLOUT,
EBI_NCAS_BLOUT,
EBI_NWE,
EBI_NDYCS
on pins EBI_DQM_1,
EBI_DQM_0_NOE
on pin EBI_CKE
on pins
EBI_NRAS_BLOUT,
EBI_NCAS_BLOUT,
EBI_NWE,
EBI_NDYCS
on pins EBI_DQM_1,
EBI_DQM_0_NOE
Rev. 1 — 9 February 2009
DD(IO)
[3]
= 1.8 V and 2.8 V (SUP8).
Low-cost, low-power ARM926EJ-S microcontrollers
Min
-
-
-
-
-
-
-
0.2
0.23
2
-
0.1
-
4
<tbd>
<tbd>
-
Typical
<tbd>
<tbd>
<tbd>
<tbd>
-
-
-
-
-
-
-
-
-
-
-
-
-
0.15 V. VDDI = 1.2
[1][2]
LPC3130/3131
0.1 V.
Max
-
-
-
-
3.5
3.5
5
3.5
3.5
5
5
5
9
10
-
-
<T
CLCL
© NXP B.V. 2009. All rights reserved.
49 of 68
Unit
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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