LPC3130_3131 NXP Semiconductors, LPC3130_3131 Datasheet - Page 17
LPC3130_3131
Manufacturer Part Number
LPC3130_3131
Description
The NXP LPC3130/3131 combine an 180 MHz ARM926EJ-S CPU core, high-speed USB2
Manufacturer
NXP Semiconductors
Datasheet
1.LPC3130_3131.pdf
(68 pages)
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NXP Semiconductors
LPC3130_3131_1
Preliminary data sheet
6.6 External Bus Interface (EBI)
6.7 Internal ROM Memory
The EBI module acts as multiplexer with arbitration between the NAND flash and the
SDRAM/SRAM memory modules connected externally through the MPMC.
The main purpose for using the EBI module is to save external pins. However only data
and address pins are multiplexed. Control signals towards and from the external memory
devices are not multiplexed.
Table 7.
The internal ROM memory is used to store the boot code of the LPC3130/3131. After a
reset, the ARM processor will start its code execution from this memory.
The LPC3130/3131 ROM memory has the following features:
The boot ROM determines the boot mode based on reset state of GPIO0, GPIO1, and
GPIO2 pins.
Module
External SRAM0
External SRAM1
External SDRAM0 0x3000 0000
•
•
•
•
•
•
•
•
•
•
•
– extended wait
One chip select for synchronous memory and two chip selects for static memory
devices.
Power-saving modes.
Dynamic memory self-refresh mode supported.
Controller support for 2 k, 4 k, and 8 k row address synchronous memory parts.
Support for all AHB burst types.
Little and big-endian support.
Support for the External Bus Interface (EBI) that enables the memory controller pads
to be shared.
Supports booting from SPI flash, NAND flash, SD/SDHC/MMC cards, UART, and
USB (DFU class) interfaces.
Supports option to perform CRC32 checking on the boot image.
Supports booting from managed NAND devices such as moviNAND, iNAND,
eMMC-NAND and eSD-NAND using SD/MMC boot mode.
Contains pre-defined MMU table (16 kB) for simple systems.
Memory map of the external SRAM/SDRAM memory modules
Table 8
Maximum address space
0x2000 0000
0x2000 0000
0x2002 0000
0x2002 0000
shows the various boot modes supported on the LPC3130/3131:
Rev. 1 — 9 February 2009
Low-cost, low-power ARM926EJ-S microcontrollers
0x2000 FFFF
0x2001 FFFF
0x2002 FFFF
0x2003 FFFF
0x37FF FFFF
Data width
8 bit
16 bit
8 bit
16 bit
16 bit
LPC3130/3131
© NXP B.V. 2009. All rights reserved.
Device size
64 kB
128 kB
64 kB
128 kB
128 MB
17 of 68
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