LPC1850FET256 NXP Semiconductors, LPC1850FET256 Datasheet - Page 90

• Manufacturer Part Number: LPC1850FET256
• Description: The LPC1850FET256 is a high-performance, cost-effective Cortex-M3 microcontroller featuring 200 kB of SRAM, and advanced peripherals including Ethernet, High Speed USB 2
• Manufacturer: NXP Semiconductors

NXP Semiconductors
8. Limiting values
Table 6.
In accordance with the Absolute Maximum Rating System (IEC 60134).
[1]
[2]
[3]
[4]
[5]
LPC1850_30_20_10
Preliminary data sheet
Symbol
V
V
V
V
V
V
V
I
I
I
T
P
V
DD
SS
latch
stg
DD(REG)(3V3)
DD(IO)
DDA(3V3)
BAT
DD(3V3)
prog(pf)
I
tot(pack)
ESD
The following applies to the limiting values:
a) This product includes circuitry specifically designed for the protection of its internal devices from the damaging effects of excessive
b) Parameters are valid over operating temperature range unless otherwise specified. All voltages are with respect to V
Including voltage on outputs in 3-state mode; at 2.0 V the speed will be reduced.
The peak current is limited to 25 times the corresponding maximum current.
Dependent on package type.
Human body model: equivalent to discharging a 100 pF capacitor through a 1.5 k series resistor.
static charge. Nonetheless, it is suggested that conventional precautions be taken to avoid applying greater than the rated
maximum.
otherwise noted.
Limiting values
Parameter
regulator supply voltage
(3.3 V)
input/output supply
voltage
analog supply voltage
(3.3 V)
battery supply voltage
supply voltage (3.3 V)
polyfuse programming
voltage
input voltage
supply current
ground current
I/O latch-up current
storage temperature
total power dissipation
(per package)
electrostatic discharge
voltage
All information provided in this document is subject to legal disclaimers.
Conditions
on pin VDDREG
on pin VDDIO
on pin VDDA
on pin VBAT
on pin V
only
on pin VPP
only valid when the V
voltage is present
per supply pin
per ground pin
(0.5V
T
based on package heat transfer,
not device power consumption
human body model; all pins
j
5 V tolerant I/O pins (see
Table
ADC/DAC pins and digital I/O
pins configured for an analog
function (see
USB0 pins (see
USB1 pins USB1_DP and
USB1_DM (see
< 125 C
Rev. 3.1 — 15 December 2011
DD(IO)
DD
3)
; LQFP100 package
) < V
Table
I
< (1.5V
Table
Table
DD(IO)
3)
3)
3)
DD(IO)
supply
[1]
);
32-bit ARM Cortex-M3 microcontroller
LPC1850/30/20/10
[2]
[3]
[3]
[4]
[5]
Min
2.2
2.2
2.2
2.2
2.2
2.7
0.5
0.5
0
0
-
-
-
65
-
2000
Max
3.6
3.6
3.6
3.6
3.6
3.6
5.5
V
5.2
5.2
100
100
100
+150
1.5
+2000
DDA(3V3)
© NXP B.V. 2011. All rights reserved.
SS
unless
Unit
V
V
V
V
V
V
V
V
V
V
mA
mA
mA
C
W
V
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