LPC1850FET256 NXP Semiconductors, LPC1850FET256 Datasheet - Page 117

• Manufacturer Part Number: LPC1850FET256
• Description: The LPC1850FET256 is a high-performance, cost-effective Cortex-M3 microcontroller featuring 200 kB of SRAM, and advanced peripherals including Ethernet, High Speed USB 2
• Manufacturer: NXP Semiconductors

NXP Semiconductors
Table 20.
C
[1]
LPC1850_30_20_10
Preliminary data sheet
Symbol
t
t
t
V
t
t
t
t
t
t
r
f
FRFM
FEOPT
FDEOP
JR1
JR2
EOPR1
EOPR2
Fig 32. Differential data-to-EOP transition skew and EOP width
L
CRS
= 50 pF; R
Characterized but not implemented as production test. Guaranteed by design.
T
PERIOD
differential
data lines
Dynamic characteristics: USB0 and USB1 pins (full-speed)
pu
11.10 USB interface
= 1.5 k
Parameter
rise time
fall time
differential rise and fall time
matching
output signal crossover voltage
source SE0 interval of EOP
source jitter for differential transition
to SE0 transition
receiver jitter to next transition
receiver jitter for paired transitions
EOP width at receiver
EOP width at receiver

on D+ to V
n × T
differential data to
crossover point
DD(IO)
SE0/EOP skew
PERIOD
; 3.0 V
All information provided in this document is subject to legal disclaimers.
+ t
FDEOP
Rev. 3.1 — 15 December 2011

V
DD(IO)
Conditions
10 % to 90 %
10 % to 90 %
see
see
10 % to 90 %
must reject as
EOP; see
Figure 32
must accept as
EOP; see
Figure 32
t

r
/ t
3.6 V.
Figure 32
Figure 32
f
crossover point
extended
[1]
[1]
32-bit ARM Cortex-M3 microcontroller
Min
7.7
-
1.3
160
2
18.5
9
40
82
8.5
LPC1850/30/20/10
source EOP width: t
receiver EOP width: t
Typ
-
-
-
-
-
-
-
-
-
-
© NXP B.V. 2011. All rights reserved.
Max
13.8
13.7
109
2.0
175
+5
+18.5
+9
-
-
FEOPT
002aab561
EOPR1
, t
EOPR2
117 of 157
Unit
ns
ns
%
V
ns
ns
ns
ns
ns
ns