LPC1850FET256 NXP Semiconductors, LPC1850FET256 Datasheet - Page 8

The LPC1850FET256 is a high-performance, cost-effective Cortex-M3 microcontroller featuring 200 kB of SRAM, and advanced peripherals including Ethernet, High Speed USB 2

LPC1850FET256

Manufacturer Part Number
LPC1850FET256
Description
The LPC1850FET256 is a high-performance, cost-effective Cortex-M3 microcontroller featuring 200 kB of SRAM, and advanced peripherals including Ethernet, High Speed USB 2
Manufacturer
NXP Semiconductors
Datasheet

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Table 3.
LCD, Ethernet, USB0, and USB1 functions are not available on all parts. See
LPC1850_30_20_10
Preliminary data sheet
Symbol
Multiplexed digital pins
P0_0
P0_1
P1_0
Pin description
L3
M2
P2
x
x
x
G2
G1
H1
50
54
47
All information provided in this document is subject to legal disclaimers.
32
34
38
Rev. 3.1 — 15 December 2011
22
23
25
[3]
[3]
[3]
I; PU I/O GPIO0[0] — General purpose digital input/output pin.
I; PU I/O GPIO0[1] — General purpose digital input/output pin.
I; PU I/O GPIO0[4] — General purpose digital input/output pin.
I/O SSP1_MISO — Master In Slave Out for SSP1.
I
-
-
-
I/O I2S0_TX_WS — Transmit Word Select. It is driven by
I/O I2S1_TX_WS — Transmit Word Select. It is driven by
I/O SSP1_MOSI — Master Out Slave in for SSP1.
I
-
-
-
I/O I2S1_TX_SDA — I
I
I/O EMC_A5 — External memory address line 5.
-
-
I/O SSP0_SSEL — Slave Select for SSP0.
-
-
Description
ENET_RXD1 — Ethernet receive data 1 (RMII/MII
interface).
R — Function reserved.
R — Function reserved.
R — Function reserved.
the master and received by the slave. Corresponds
to the signal WS in the I
the master and received by the slave. Corresponds
to the signal WS in the I
ENET_COL — Ethernet Collision detect (MII
interface).
R — Function reserved.
R — Function reserved.
R — Function reserved.
ENET_TX_EN — Ethernet transmit enable (RMII/MII
interface).
the transmitter and read by the receiver. Corresponds
to the signal SD in the I
CTIN_3 — SCT input 3. Capture input 1 of timer 1.
R — Function reserved.
R — Function reserved.
R — Function reserved.
R — Function reserved.
Table
32-bit ARM Cortex-M3 microcontroller
LPC1850/30/20/10
2.
2
S1 transmit data. It is driven by
2
2
2
S-bus specification.
S-bus specification.
S-bus specification.
© NXP B.V. 2011. All rights reserved.
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