ATmega48PA Automotive Atmel Corporation, ATmega48PA Automotive Datasheet - Page 83
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ATmega48PA Automotive
Manufacturer Part Number
ATmega48PA Automotive
Description
Manufacturer
Atmel Corporation
- Current page: 83 of 371
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Atmel ATmega48PA/88PA/168PA [Preliminary]
• SS/OC1B/PCINT2 – Port B, Bit 2
SS: Slave Select input. When the SPI is enabled as a Slave, this pin is configured as an input
regardless of the setting of DDB2. As a Slave, the SPI is activated when this pin is driven low.
When the SPI is enabled as a Master, the data direction of this pin is controlled by DDB2.
When the pin is forced by the SPI to be an input, the pull-up can still be controlled by the
PORTB2 bit.
OC1B, Output Compare Match output: The PB2 pin can serve as an external output for the
Timer/Counter1 Compare Match B. The PB2 pin has to be configured as an output (DDB2 set
(one)) to serve this function. The OC1B pin is also the output pin for the PWM mode timer
function.
PCINT2: Pin Change Interrupt source 2. The PB2 pin can serve as an external interrupt
source.
• OC1A/PCINT1 – Port B, Bit 1
OC1A, Output Compare Match output: The PB1 pin can serve as an external output for the
Timer/Counter1 Compare Match A. The PB1 pin has to be configured as an output (DDB1 set
(one)) to serve this function. The OC1A pin is also the output pin for the PWM mode timer
function.
PCINT1: Pin Change Interrupt source 1. The PB1 pin can serve as an external interrupt
source.
• ICP1/CLKO/PCINT0 – Port B, Bit 0
ICP1, Input Capture Pin: The PB0 pin can act as an Input Capture Pin for Timer/Counter1.
CLKO, Divided System Clock: The divided system clock can be output on the PB0 pin. The
divided system clock will be output if the CKOUT Fuse is programmed, regardless of the
PORTB0 and DDB0 settings. It will also be output during reset.
PCINT0: Pin Change Interrupt source 0. The PB0 pin can serve as an external interrupt
source.
Table 14-4
and
Table 14-5 on page 84
relate the alternate functions of Port B to the overriding
signals shown in
Figure 14-5 on page
79. SPI MSTR INPUT and SPI SLAVE OUTPUT consti-
tute the MISO signal, while MOSI is divided into SPI MSTR OUTPUT and SPI SLAVE INPUT.
83
9223B–AVR–09/11
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