ATmega48PA Automotive Atmel Corporation, ATmega48PA Automotive Datasheet - Page 23
ATmega48PA Automotive
Manufacturer Part Number
ATmega48PA Automotive
Description
Manufacturer
Atmel Corporation
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9223B–AVR–09/11
When the write access time has elapsed, the EEPE bit is cleared by hardware. The user soft-
ware can poll this bit and wait for a zero before writing the next byte. When EEPE has been
set, the CPU is halted for two cycles before the next instruction is executed.
• Bit 0 – EERE: EEPROM Read Enable
The EEPROM Read Enable Signal EERE is the read strobe to the EEPROM. When the cor-
rect address is set up in the EEAR Register, the EERE bit must be written to a logic one to
trigger the EEPROM read. The EEPROM read access takes one instruction, and the
requested data is available immediately. When the EEPROM is read, the CPU is halted for
four cycles before the next instruction is executed.
The user should poll the EEPE bit before starting the read operation. If a write operation is in
progress, it is neither possible to read the EEPROM, nor to change the EEAR Register.
The calibrated Oscillator is used to time the EEPROM accesses.
programming time for EEPROM access from the CPU.
Table 8-2.
The following code examples show one assembly and one C function for writing to the
EEPROM. The examples assume that interrupts are controlled (e.g. by disabling interrupts
globally) so that no interrupts will occur during execution of these functions. The examples
also assume that no Flash Boot Loader is present in the software. If such code is present, the
EEPROM write function must also wait for any ongoing SPM command to finish.
Symbol
EEPROM write
(from CPU)
Atmel ATmega48PA/88PA/168PA [Preliminary]
EEPROM Programming Time
Number of Calibrated RC Oscillator Cycles
26,368
Table 8-2
Typ Programming Time
3.3ms
lists the typical
23
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