ATmega48PA Automotive Atmel Corporation, ATmega48PA Automotive Datasheet - Page 141
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ATmega48PA Automotive
Manufacturer Part Number
ATmega48PA Automotive
Description
Manufacturer
Atmel Corporation
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Figure 17-2. Prescaler for Timer/Counter0 and Timer/Counter1
9223B–AVR–09/11
PSRSYNC
clk
T0
T1
I/O
Synchronization
Synchronization
Enabling and disabling of the clock input must be done when T1/T0 has been stable for at
least one system clock cycle, otherwise it is a risk that a false Timer/Counter clock pulse is
generated.
Each half period of the external clock applied must be longer than one system clock cycle to
ensure correct sampling. The external clock must be guaranteed to have less than half the
system clock frequency (f
uses sampling, the maximum frequency of an external clock it can detect is half the sampling
frequency (Nyquist sampling theorem). However, due to variation of the system clock fre-
quency and duty cycle caused by Oscillator source (crystal, resonator, and capacitors)
tolerances, it is recommended that maximum frequency of an external clock source is less
than f
An external clock source can not be prescaled.
Note:
Atmel ATmega48PA/88PA/168PA [Preliminary]
clk_I/O
1. The synchronization logic on the input pins (T1/T0) is shown in
/2.5.
clk
ExtClk
Clear
T1
< f
clk_I/O
(1)
/2) given a 50/50% duty cycle. Since the edge detector
clk
T0
Figure
17-1.
141
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