ATmega48PA Automotive Atmel Corporation, ATmega48PA Automotive Datasheet - Page 284
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ATmega48PA Automotive
Manufacturer Part Number
ATmega48PA Automotive
Description
Manufacturer
Atmel Corporation
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27.8.1
27.8.2
27.8.3
27.8.4
27.8.5
284
Atmel ATmega48PA/88PA/168PA [Preliminary]
Performing Page Erase by SPM
Filling the Temporary Buffer (Page Loading)
Performing a Page Write
Using the SPM Interrupt
Consideration While Updating BLS
It is essential that the page address used in both the Page Erase and Page Write operation is
addressing the same page. See
288
To execute Page Erase, set up the address in the Z-pointer, write “X0000011” to SPMCSR
and execute SPM within four clock cycles after writing SPMCSR. The data in R1 and R0 is
ignored. The page address must be written to PCPAGE in the Z-register. Other bits in the
Z-pointer will be ignored during this operation.
To write an instruction word, set up the address in the Z-pointer and data in R1:R0, write
“00000001” to SPMCSR and execute SPM within four clock cycles after writing SPMCSR. The
content of PCWORD in the Z-register is used to address the data in the temporary buffer. The
temporary buffer will auto-erase after a Page Write operation or by writing the RWWSRE bit in
SPMCSR. It is also erased after a system reset. Note that it is not possible to write more than
one time to each address without erasing the temporary buffer.
If the EEPROM is written in the middle of an SPM Page Load operation, all data loaded will be
lost.
To execute Page Write, set up the address in the Z-pointer, write “X0000101” to SPMCSR and
execute SPM within four clock cycles after writing SPMCSR. The data in R1 and R0 is
ignored. The page address must be written to PCPAGE. Other bits in the Z-pointer must be
written to zero during this operation.
If the SPM interrupt is enabled, the SPM interrupt will generate a constant interrupt when the
SELFPRGEN bit in SPMCSR is cleared. This means that the interrupt can be used instead of
polling the SPMCSR Register in software. When using the SPM interrupt, the Interrupt Vectors
should be moved to the BLS section to avoid that an interrupt is accessing the RWW section
when it is blocked for reading. How to move the interrupts is described in
58.
Special care must be taken if the user allows the Boot Loader section to be updated by leaving
Boot Lock bit11 unprogrammed. An accidental write to the Boot Loader itself can corrupt the
entire Boot Loader, and further software updates might be impossible. If it is not necessary to
change the Boot Loader software itself, it is recommended to program the Boot Lock bit11 to
protect the Boot Loader software from any internal software changes.
• Page Erase to the RWW section: The NRWW section can be read during the Page Erase.
• Page Erase to the NRWW section: The CPU is halted during the operation.
• Page Write to the RWW section: The NRWW section can be read during the Page Write.
• Page Write to the NRWW section: The CPU is halted during the operation.
for an assembly code example.
“Simple Assembly Code Example for a Boot Loader” on page
“Interrupts” on page
9223B–AVR–09/11
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