ATmega48PA Automotive Atmel Corporation, ATmega48PA Automotive Datasheet - Page 265
ATmega48PA Automotive
Manufacturer Part Number
ATmega48PA Automotive
Description
Manufacturer
Atmel Corporation
- Current page: 265 of 371
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24.9.3
24.9.3.1
24.9.3.2
24.9.4
9223B–AVR–09/11
ADCL and ADCH – The ADC Data Register
ADCSRB – ADC Control and Status Register B
ADLAR = 0
ADLAR = 1
When an ADC conversion is complete, the result is found in these two registers.
When ADCL is read, the ADC Data Register is not updated until ADCH is read. Consequently,
if the result is left adjusted and no more than 8-bit precision is required, it is sufficient to read
ADCH. Otherwise, ADCL must be read first, then ADCH.
The ADLAR bit in ADMUX, and the MUXn bits in ADMUX affect the way the result is read from
the registers. If ADLAR is set, the result is left adjusted. If ADLAR is cleared (default), the
result is right adjusted.
• ADC9:0: ADC Conversion Result
These bits represent the result from the conversion, as detailed in
on page
• Bit 7, 5:3 – Reserved
These bits are reserved for future use. To ensure compatibility with future devices, these bits
must be written to zero when ADCSRB is written.
Bit
(0x79)
(0x78)
Read/Write
Initial Value
Bit
(0x79)
(0x78)
Read/Write
Initial Value
Bit
(0x7B)
Read/Write
Initial Value
Atmel ATmega48PA/88PA/168PA [Preliminary]
260.
ADC7
ADC9
ADC1
15
15
R
R
R
R
–
7
0
0
7
0
0
R
7
–
0
ADC6
ADC8
ADC0
ACME
R/W
14
14
R
R
R
R
–
6
0
0
6
0
0
6
0
ADC5
ADC7
13
13
R
R
R
R
–
5
0
0
–
5
0
0
R
5
–
0
ADC4
ADC6
12
12
R
R
R
R
–
4
0
0
–
4
0
0
R
4
–
0
ADC3
ADC5
11
11
R
R
–
3
0
0
R
R
–
3
0
0
R
3
–
0
ADTS2
ADC2
ADC4
R/W
10
10
R
R
–
2
0
0
R
R
–
2
0
0
2
0
“ADC Conversion Result”
ADTS1
ADC9
ADC1
ADC3
R/W
R
R
9
1
0
0
R
R
9
–
1
0
0
1
0
ADTS0
ADC8
ADC0
ADC2
R/W
R
R
8
0
0
0
R
R
8
–
0
0
0
0
0
ADCSRB
ADCH
ADCL
ADCH
ADCL
265
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