ATmega48PA Automotive Atmel Corporation, ATmega48PA Automotive Datasheet - Page 278
ATmega48PA Automotive
Manufacturer Part Number
ATmega48PA Automotive
Description
Manufacturer
Atmel Corporation
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27.4
27.4.1
27.4.2
278
Read-While-Write and No Read-While-Write Flash Sections
Atmel ATmega48PA/88PA/168PA [Preliminary]
RWW – Read-While-Write Section
NRWW – No Read-While-Write Section
Whether the CPU supports Read-While-Write or if the CPU is halted during a Boot Loader
software update is dependent on which address that is being programmed. In addition to the
two sections that are configurable by the BOOTSZ Fuses as described above, the Flash is
also divided into two fixed sections, the Read-While-Write (RWW) section and the No
Read-While-Write (NRWW) section. The limit between the RWW- and NRWW sections is
given in
the two sections is:
• When erasing or writing a page located inside the RWW section, the NRWW section can be
• When erasing or writing a page located inside the NRWW section, the CPU is halted during
Note that the user software can never read any code that is located inside the RWW section
during a Boot Loader software operation. The syntax “Read-While-Write section” refers to
which section that is being programmed (erased or written), not which section that actually is
being read during a Boot Loader software update.
If a Boot Loader software update is programming a page inside the RWW section, it is possi-
ble to read code from the Flash, but only code that is located in the NRWW section. During an
on-going programming, the software must ensure that the RWW section never is being read. If
the user software is trying to read code that is located inside the RWW section (i.e., by a
call/jmp/lpm or an interrupt) during programming, the software might end up in an unknown
state. To avoid this, the interrupts should either be disabled or moved to the Boot Loader sec-
tion. The Boot Loader section is always located in the NRWW section. The RWW Section
Busy bit (RWWSB) in the Store Program Memory Control and Status Register (SPMCSR) will
be read as logical one as long as the RWW section is blocked for reading. After a program-
ming is completed, the RWWSB must be cleared by software before reading code located in
the RWW section.
page 292.
The code located in the NRWW section can be read when the Boot Loader software is updat-
ing a page in the RWW section. When the Boot Loader code updates the NRWW section, the
CPU is halted during the entire Page Erase or Page Write operation.
Table 27-1.
Z-pointer Address during
read during the operation.
the entire operation.
Which Section does the
the Programming?
NRWW Section
RWW Section
Table 27-8 on page 290
for details on how to clear RWWSB.
Read-While-Write Features
See “SPMCSR – Store Program Memory Control and Status Register” on
Which Section can be read
during Programming?
and
NRWW Section
Figure 27-2 on page
None
CPU Halted?
280. The main difference between
Yes
No
Read-While-Write
Supported?
9223B–AVR–09/11
Yes
No
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