AT32UC3C1512C Automotive Atmel Corporation, AT32UC3C1512C Automotive Datasheet - Page 918
AT32UC3C1512C Automotive
Manufacturer Part Number
AT32UC3C1512C Automotive
Description
Manufacturer
Atmel Corporation
Datasheets
1.AT90CAN128_AUTOMOTIVE.pdf
(225 pages)
2.AT32UC3C0512C_AUTOMOTIVE.pdf
(1312 pages)
3.AT32UC3C0512C_AUTOMOTIVE.pdf
(107 pages)
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32.7.2
32.7.2.1
Register Name:
Access Type:
Offset:
Reset Value:
• GNAK: Global NAK
• LS: low-speed mode force
• RMWKUP: Remote wakeup
• DETACH: Detach
• ADDEN: Address Enable
• UADD: USB Address
9166C–AVR-08/11
ADDEN
31
23
15
7
-
-
-
0: Normal mode.
1: A NAK handshake is answered for each USB transaction regardless of the current endpoint memory bank status.
0: The full-speed mode is active.
1: The low-speed mode is active.
This bit can be written to even if USBE is zero or FRZCLK is one. Disabling the USBC (by writing a zero to the USBE bit) does
not reset this bit.
Writing a zero to this bit has no effect.
Writing a one to this bit will send an upstream resume to the host for a remote wakeup.
This bit is cleared when the USBC receives a USB reset or once the upstream resume has been sent.
Writing a zero to this bit will reconnect the device.
Writing a one to this bit will physically detach the device (disconnect internal pull-up resistor from DP and DM).
Writing a zero to this bit has no effect.
Writing a one to this bit will activate the UADD field (USB address).
This bit is cleared when a USB reset is received.
This field contains the device address.
This field is cleared when a USB reset is received.
USB Device Registers
Device General Control Register
30
22
14
6
-
-
-
UDCON
Read/Write
0x0000
0x00000100
29
21
13
5
-
-
-
LS
28
20
12
4
-
-
UADD
27
19
11
3
-
-
-
26
18
10
2
-
-
-
RMWKUP
GNAK
25
17
9
1
-
AT32UC3C
DETACH
24
16
8
0
-
-
918
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