AT32UC3C1512C Automotive Atmel Corporation, AT32UC3C1512C Automotive Datasheet - Page 764
AT32UC3C1512C Automotive
Manufacturer Part Number
AT32UC3C1512C Automotive
Description
Manufacturer
Atmel Corporation
Datasheets
1.AT90CAN128_AUTOMOTIVE.pdf
(225 pages)
2.AT32UC3C0512C_AUTOMOTIVE.pdf
(1312 pages)
3.AT32UC3C0512C_AUTOMOTIVE.pdf
(107 pages)
- AT90CAN128_AUTOMOTIVE PDF datasheet
- AT32UC3C0512C_AUTOMOTIVE PDF datasheet #2
- AT32UC3C0512C_AUTOMOTIVE PDF datasheet #3
- Current page: 764 of 1312
- Download datasheet (20Mb)
29.6.1.5
29.6.2
29.6.2.1
29.6.2.2
9166C–AVR-08/11
Channel Handling
Memory pointer
Initialization
Enabling / Disabling
When Overrun Mode is enabled, the MOb is not disabled after a successful reception. Overrun
Mode is enabled by writing a one to CANCFG.OVRM. The Overwrite bit in the MOb Status Reg-
ister (MObSR.OVW) is set if a previously received message has been overwritten.
The mode configured by CANCFG.OVRM is used by all MObs configured for reception.
Each channel uses a section of RAM for storing messages. User must allocate RAM space for
the channels and store the base address of this space into the Channel RAM Base Address
Register (CANRAMB). Four words per MOb in use must be allocated.
Channels operate independently so the allocated memory spaces do not need to be consecu-
tive. Make sure that the memory spaces do not overlap.
CAN channels are initialized by writing a one to the Initialization bit in the Control Register
(CANCTRL.INIT).
Initialization resets all internal state machines and clears all user interface registers except CAN-
RAMB, CANCFG and CANCTRL.INIT.
CANCTRL.INIT should not be cleared until the channel has been disabled. The channel is dis-
abled by writing the Channel Enable bit (CANCTRL.CEN) to zero. When the Channel Enable
status bit (CANSR.CEN) is zero, the channel has been disabled and CANCTRL.INIT can be
written to zero. Thereafter the channel can be restarted by writing a one to CANCTRL.CEN. See
Figure 29-4
It is not possible to write to other CANCTRL bits when CANCTRL.INIT is one. User must write a
zero to CANCTRL.INIT before writing a new value to CANCTRL.
Figure 29-4. Initialization Sequence
Note: Initialization requires all clocks to be running.
A channel is enabled and ready to communicate on the bus when it has detected a bus idle con-
dition (i.e. 11 consecutive recessive bits).
The channel is enabled by writing a one to CANCTRL.CEN and disabled by writing a zero to this
bit. The enable status of channel can be read in CANSR.CES bit.
for details.
CANCTRL.CEN
CANCTRL.INIT
CANSR.CES
init. request
(user write)
release init.
(user write)
(user write)
restart
AT32UC3C
764
Related parts for AT32UC3C1512C Automotive
Image
Part Number
Description
Manufacturer
Datasheet
Request
R
Part Number:
Description:
Manufacturer:
Atmel Corporation
Datasheet:
Part Number:
Description:
INTERVAL AND WIPE/WASH WIPER CONTROL IC WITH DELAY
Manufacturer:
ATMEL Corporation
Datasheet:
Part Number:
Description:
Low-Voltage Voice-Switched IC for Hands-Free Operation
Manufacturer:
ATMEL Corporation
Datasheet:
Part Number:
Description:
MONOLITHIC INTEGRATED FEATUREPHONE CIRCUIT
Manufacturer:
ATMEL Corporation
Datasheet:
Part Number:
Description:
AM-FM Receiver IC U4255BM-M
Manufacturer:
ATMEL Corporation
Datasheet:
Part Number:
Description:
Monolithic Integrated Feature Phone Circuit
Manufacturer:
ATMEL Corporation
Datasheet:
Part Number:
Description:
Multistandard Video-IF and Quasi Parallel Sound Processing
Manufacturer:
ATMEL Corporation
Datasheet:
Part Number:
Description:
High-performance EE PLD
Manufacturer:
ATMEL Corporation
Datasheet:
Part Number:
Description:
8-bit Flash Microcontroller
Manufacturer:
ATMEL Corporation
Datasheet:
Part Number:
Description:
2-Wire Serial EEPROM
Manufacturer:
ATMEL Corporation
Datasheet: