AT32UC3C1512C Automotive Atmel Corporation, AT32UC3C1512C Automotive Datasheet - Page 734
AT32UC3C1512C Automotive
Manufacturer Part Number
AT32UC3C1512C Automotive
Description
Manufacturer
Atmel Corporation
Datasheets
1.AT90CAN128_AUTOMOTIVE.pdf
(225 pages)
2.AT32UC3C0512C_AUTOMOTIVE.pdf
(1312 pages)
3.AT32UC3C0512C_AUTOMOTIVE.pdf
(107 pages)
- AT90CAN128_AUTOMOTIVE PDF datasheet
- AT32UC3C0512C_AUTOMOTIVE PDF datasheet #2
- AT32UC3C0512C_AUTOMOTIVE PDF datasheet #3
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28.8.2
28.8.2.1
9166C–AVR-08/11
Operation
Bus Timing
Figure 28-4. Transfer Format
The TWIS has two modes of operation:
A master is a device which starts and stops a transfer and generates the TWCK clock. A slave is
assigned an address and responds to requests from the master. These modes are described in
the following chapters.
Figure 28-5. Typical Application Block Diagram
The Timing Register (TR) is used to control the timing of bus signals driven by the TWIS. TR
describes bus timings as a function of cycles of the prescaled CLK_TWIS. The clock prescaling
can be selected through TR.EXP.
TR has the following fields:
• Slave transmitter mode
• Slave receiver mode
Rp: Pull up value as given by the I²C Standard
Host with
Interface
TWI
TWD
TWCK
TWD
TWCK
Start
Serial EEPROM
Atmel TWI
Slave 1
Address
R/W
f
Ack
PRESCALED
I²C RTC
Slave 2
Data
=
f
------------------------ -
2
CLK_TWIS
(
EXP
Controller
I²C LCD
Slave 3
+
Ack
1
)
Data
I²C Temp.
Sensor
Slave 4
Rp
AT32UC3C
Ack
Stop
Rp
VDD
734
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