AT32UC3C1512C Automotive Atmel Corporation, AT32UC3C1512C Automotive Datasheet - Page 415
AT32UC3C1512C Automotive
Manufacturer Part Number
AT32UC3C1512C Automotive
Description
Manufacturer
Atmel Corporation
Datasheets
1.AT90CAN128_AUTOMOTIVE.pdf
(225 pages)
2.AT32UC3C0512C_AUTOMOTIVE.pdf
(1312 pages)
3.AT32UC3C0512C_AUTOMOTIVE.pdf
(107 pages)
- AT90CAN128_AUTOMOTIVE PDF datasheet
- AT32UC3C0512C_AUTOMOTIVE PDF datasheet #2
- AT32UC3C0512C_AUTOMOTIVE PDF datasheet #3
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21.7.1
Name:
Access Type :
Offset:
Reset Value:
• ARB: Arbitration Mode
• CHxDIS: Channel Disable
• CHxM: Channel Mode
• CHxEN: Channel Enable
9166C–AVR-08/11
31
23
15
7
-
-
-
-
0: The MDMA is in Fixed Priority Mode.
1: The MDMA is in Round-Robin Mode.
Writing a zero to this bit has no effect.
Writing a one to this bit disables the MDMA channel after the current transfer has completed.
To avoid hazards, CHxDIS bits can only be changed by writing a value to CR where the corresponding CHxEN bit is set.
This bit is automatically cleared by hardware when the corresponding channel has been disabled.
0: The channel is in Single Transfer Mode.
1: The channel is in Descriptor Mode.
To avoid hazards, CHxM bits can only be changed by writing a value to CR where the corresponding CHxEN bit is set.
Writing a zero to this bit this bit has no effect.
Writing a one to this bit enables the channel for DMA transfer.
This bit is automatically cleared if the transfer completes when the channel is in single transfer mode.
This bit is automatically cleared if the transfer completes when the channel is in descriptor mode, and the next descriptor read in
has a cleared Valid bit.
This bit is automatically cleared when the corresponding channel has been disabled by writing a one to CHxDIS.
Control Register
30
22
14
6
-
-
-
-
CR
Read/Write
0x00
0x000000000
29
21
13
5
-
-
-
-
28
20
12
4
-
-
-
-
CH3DIS
CH3EN
CH3M
27
19
11
3
-
CH2DIS
CH2EN
CH2M
26
18
10
2
-
CH1DIS
CH1EN
CH1M
25
17
9
1
-
AT32UC3C
CH0DIS
CH0EN
CH0M
ARB
24
16
8
0
415
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