AT32UC3C1512C Automotive Atmel Corporation, AT32UC3C1512C Automotive Datasheet - Page 64
AT32UC3C1512C Automotive
Manufacturer Part Number
AT32UC3C1512C Automotive
Description
Manufacturer
Atmel Corporation
Datasheets
1.AT90CAN128_AUTOMOTIVE.pdf
(225 pages)
2.AT32UC3C0512C_AUTOMOTIVE.pdf
(1312 pages)
3.AT32UC3C0512C_AUTOMOTIVE.pdf
(107 pages)
- AT90CAN128_AUTOMOTIVE PDF datasheet
- AT32UC3C0512C_AUTOMOTIVE PDF datasheet #2
- AT32UC3C0512C_AUTOMOTIVE PDF datasheet #3
- Current page: 64 of 1312
- Download datasheet (20Mb)
7.7.6
Name:
Access Type:
Offset:
Reset Value:
•
9166C–AVR-08/11
MASK: Clock Mask
31
23
15
7
-
-
-
-
If bit n is written to zero, the clock divided by 2
according to the current power mode.
Divided Clock Mask
30
22
14
6
-
-
PBADIVMASK/PBBDIVMASK/PBCDIVMASK
Read/Write
0x0040, 0x0044, 0x0048
-
Table 7-8.
Table 7-9.
Bit
0
1
2
3
4
5
6
Bit
0
1
2
3
29
21
13
5
-
-
-
USART0
PBA Divided Clock Mask
PBC Divided Clock Mask
USART1
Table 7-8
CLK_PBC_USART_DIV
(n+1)
CLK_PBA_USART_DIV
28
20
12
and
4
-
-
-
is stopped. If bit n is written to one, the clock divided by 2
Table 7-9
-
-
-
USART2
-
-
-
-
-
-
MASK[6:0]
show what clocks are affected by the different MASK bits.
27
19
11
USART4
3
-
-
-
USART3
26
18
10
2
-
-
-
TIMER0_CLOCK2
TIMER0_CLOCK3
25
17
9
1
-
-
-
TIMER1_CLOCK2
TIMER1_CLOCK3
TIMER1_CLOCK4
TIMER1_CLOCK5
TC0
AT32UC3C
-
-
TC1
(n+1)
-
-
-
is enabled
24
16
8
0
-
-
-
64
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