AT32UC3C1512C Automotive Atmel Corporation, AT32UC3C1512C Automotive Datasheet - Page 228
AT32UC3C1512C Automotive
Manufacturer Part Number
AT32UC3C1512C Automotive
Description
Manufacturer
Atmel Corporation
Datasheets
1.AT90CAN128_AUTOMOTIVE.pdf
(225 pages)
2.AT32UC3C0512C_AUTOMOTIVE.pdf
(1312 pages)
3.AT32UC3C0512C_AUTOMOTIVE.pdf
(107 pages)
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14.6.2
14.6.2.1
14.6.3
9166C–AVR-08/11
Event Shaper (EVS) Operation
Event Propagation Latency
Input Glitch Filter (IGF)
PEVC contains Event Shapers (EVS) for certain types of generators:
Each Event Shaper is responsible of shaping one input, prior to going through a PEVC channel:
Input Glitch Filtering can be turned on or off by writing to the Input Glitch Filter (IGF) field of the
corresponding Event Shaper Register (EVS).
When IGF is on, the incoming event is sampled periodically. The sampling clock is divided from
CLK_RCSYS by the value of the Input Glitch Filter Divider Register (IGFDR). IGF will filter out
spikes and propagate only incoming events that respect one of the following two conditions :
Both CLK_RCSYS and CLK_PEVC must be enabled to use Input Glitch Filtering.
Once a channel is setup, incoming peripheral events are relayed by hardware. Event progation
latency is therefore cycle deterministic. However, its value depends on the exact settings that
apply to a given channel.
When the channel multiplexer CHMXn.EVMX selects a generator without Event Shaper, event
propagation latency is 0 cycle. Software event is a particular case of 0 cycle propagation.
When the channel multiplexer CHMXn.EVMX selects a generator with Event Shaper, event
propagation latency depends on Input Glitch Filter setting EVSm.IGF :
Table 14-2.
Please refer to the Module Configuration section at the end of this chapter for the list of genera-
tors implementing Event Shapers.
Generator
CHMXn.EVMX
Generator without Event Shaper
Software event
Generator with Event Shaper
Generator with Event Shaper
• Asynchronous generators and/or external input
• General-purpose waveforms like timer outputs or Generic Clocks
• Synchronize asynchronous external inputs
• Apply any additional glich-filtering
• Detect rise, fall, or both edges of the incoming signal
• rise event : 2 samples low, followed by 0+ changes, followed by 2 samples high
• fall event : 2 samples high, followed by 0+ changes, followed by 2 samples low
• IGF off : event propagation latency is lesser or equal to 2 CLK_PEVC cycles
• IGF on : event propagation latency is lesser or equal to 3 *
Event Propagation Latency
Input Glitch Filter
EVSm.IGF
-
Off
On
-
Latency
0
0
2
3 * 2
2
IGFDR+1
IGFDR+1
* CLK_RCSYS cycles
AT32UC3C
Clock
-
-
CLK_PEVC
CLK_RCSYS
228
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