ATtiny48 Atmel Corporation, ATtiny48 Datasheet - Page 53

• Manufacturer Part Number: ATtiny48
• Manufacturer: Atmel Corporation

Specifications of ATtiny48

• Flash (kbytes): 4 Kbytes
• Pin Count: 32
• Max. Operating Frequency: 12 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 12
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 28
• Ext Interrupts: 28
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Twi (i2c): 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 0.25
• Eeprom (bytes): 64
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8 to 5.5
• Operating Voltage (vcc): 1.8 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 2
• Output Compare Channels: 4
• Input Capture Channels: 1
• Pwm Channels: 2
• 32khz Rtc: No
• Calibrated Rc Oscillator: Yes

9.2
8008H–AVR–04/11
External Interrupts
A typical and general setup for interrupt vector addresses in ATtiny48/88 is shown in the pro-
gram example below.
Note:
The External Interrupts are triggered by the INT0 and INT1 pins or any of the PCINT[27:0] pins.
Observe that, if enabled, the interrupts will trigger even if the INT0 and INT1 or PCINT[27:0] pins
are configured as outputs. This feature provides a way of generating a software interrupt, as
follows.
The PCMSK3, PCMSK2, PCMSK1 and PCMSK0 registers control which pins contribute to the
pin change interrupts. Pin change interrupts on PCINT[27:0] are detected asynchronously. This
Assembly Code Example
• Pin Change Interrupt PCI3 triggers if a pin in PCINT[27:24] is toggled while enabled
• Pin Change Interrupt PCI2 triggers if a pin in PCINT[23:16] is toggled while enabled
• Pin Change Interrupt PCI1 triggers if a pin in PCINT[15:8] is toggled while enabled
• Pin Change Interrupt PCI0 triggers if a pin in PCINT[7:0] is toggled while enabled
.org 0x0000
RESET:
rjmp RESET
rjmp INT0_ISR
rjmp INT1_ISR
rjmp PCINT0_ISR
rjmp PCINT1_ISR
rjmp PCINT2_ISR
rjmp PCINT3_ISR
rjmp WDT_ISR
rjmp TIM1_CAPT_ISR
rjmp TIM1_COMPA_ISR
rjmp TIM1_COMPB_ISR
rjmp TIM1_OVF_ISR
rjmp TIM0_COMPA_ISR
rjmp TIM0_COMPB_ISR
rjmp TIM0_OVF_ISR
rjmp SPI_STC_ISR
rjmp ADC_ISR
rjmp EE_RDY_ISR
rjmp ANA_COMP_ISR
rjmp TWI_ISR
<instr>
...
See
“About Code Examples” on page
7.
;Set address of next statement
; Address 0x0000
; Address 0x0001
; Address 0x0002
; Address 0x0003
; Address 0x0004
; Address 0x0005
; Address 0x0006
; Address 0x0007
; Address 0x0008
; Address 0x0009
; Address 0x000A
; Address 0x000B
; Address 0x000C
; Address 0x000D
; Address 0x000E
; Address 0x000F
; Address 0x0010
; Address 0x0011
; Address 0x0012
; Address 0x0013
; Main program start
; Address 0x0038
ATtiny48/88
53