ATmega1281R231 Atmel Corporation, ATmega1281R231 Datasheet - Page 57

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ATmega1281R231

Manufacturer Part Number
ATmega1281R231
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATmega1281R231

Flash (kbytes)
128 Kbytes
Max. Operating Frequency
16 MHz
Max I/o Pins
54
Spi
3
Twi (i2c)
1
Uart
2
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Crypto Engine
AES
Sram (kbytes)
8
Eeprom (bytes)
4096
Operating Voltage (vcc)
1.8 to 3.6
Timers
6
Frequency Band
2.4 GHz
Max Data Rate (mb/s)
2
Antenna Diversity
Yes
External Pa Control
Yes
Power Output (dbm)
3
Receiver Sensitivity (dbm)
-101
Receive Current Consumption (ma)
13.2
Transmit Current Consumption (ma)
14.4
Link Budget (dbm)
104
11.10.3
2549N–AVR–05/11
PRR1 – Power Reduction Register 1
• Bit 6 - PRTIM2: Power Reduction Timer/Counter2
Writing a logic one to this bit shuts down the Timer/Counter2 module in synchronous mode (AS2
is 0). When the Timer/Counter2 is enabled, operation will continue like before the shutdown.
• Bit 5 - PRTIM0: Power Reduction Timer/Counter0
Writing a logic one to this bit shuts down the Timer/Counter0 module. When the Timer/Counter0
is enabled, operation will continue like before the shutdown.
• Bit 4 - Res: Reserved bit
This bit is reserved bit and will always read as zero.
• Bit 3 - PRTIM1: Power Reduction Timer/Counter1
Writing a logic one to this bit shuts down the Timer/Counter1 module. When the Timer/Counter1
is enabled, operation will continue like before the shutdown.
• Bit 2 - PRSPI: Power Reduction Serial Peripheral Interface
Writing a logic one to this bit shuts down the Serial Peripheral Interface by stopping the clock to
the module. When waking up the SPI again, the SPI should be re initialized to ensure proper
operation.
• Bit 1 - PRUSART0: Power Reduction USART0
Writing a logic one to this bit shuts down the USART0 by stopping the clock to the module.
When waking up the USART0 again, the USART0 should be re initialized to ensure proper
operation.
• Bit 0 - PRADC: Power Reduction ADC
Writing a logic one to this bit shuts down the ADC. The ADC must be disabled before shut down.
The analog comparator cannot use the ADC input MUX when the ADC is shut down.
• Bit 7:6 - Res: Reserved bits
These bits are reserved and will always read as zero.
• Bit 5 - PRTIM5: Power Reduction Timer/Counter5
Writing a logic one to this bit shuts down the Timer/Counter5 module. When the Timer/Counter5
is enabled, operation will continue like before the shutdown.
• Bit 4 - PRTIM4: Power Reduction Timer/Counter4
Writing a logic one to this bit shuts down the Timer/Counter4 module. When the Timer/Counter4
is enabled, operation will continue like before the shutdown.
• Bit 3 - PRTIM3: Power Reduction Timer/Counter3
Writing a logic one to this bit shuts down the Timer/Counter3 module. When the Timer/Counter3
is enabled, operation will continue like before the shutdown.
Bit
(0x65)
Read/Write
Initial Value
R
7
0
R
6
0
PRTIM5
R/W
5
0
ATmega640/1280/1281/2560/2561
PRTIM4
R/W
4
0
PRTIM3
R/W
3
0
PRUSART3
R/W
2
0
PRUSART2
R/W
1
0
PRUSART1
R/W
0
0
PRR1
57

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