ATmega1281R231 Atmel Corporation, ATmega1281R231 Datasheet - Page 109

• Manufacturer Part Number: ATmega1281R231
• Manufacturer: Atmel Corporation

Specifications of ATmega1281R231

• Flash (kbytes): 128 Kbytes
• Max. Operating Frequency: 16 MHz
• Max I/o Pins: 54
• Spi: 3
• Twi (i2c): 1
• Uart: 2
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Crypto Engine: AES
• Sram (kbytes): 8
• Eeprom (bytes): 4096
• Operating Voltage (vcc): 1.8 to 3.6
• Timers: 6
• Frequency Band: 2.4 GHz
• Max Data Rate (mb/s): 2
• Antenna Diversity: Yes
• External Pa Control: Yes
• Power Output (dbm): 3
• Receiver Sensitivity (dbm): -101
• Receive Current Consumption (ma): 13.2
• Transmit Current Consumption (ma): 14.4
• Link Budget (dbm): 104

14.3
2549N–AVR–05/11
Moving Interrupts Between Application and Boot Section
When the BOOTRST Fuse is programmed and the Boot section size set to 8Kbytes, the most
typical and general program setup for the Reset and Interrupt Vector Addresses is:
When the BOOTRST Fuse is programmed, the Boot section size set to 8Kbytes and the IVSEL
bit in the MCUCR Register is set before any interrupts are enabled, the most typical and general
program setup for the Reset and Interrupt Vector Addresses is:
The MCU Control Register controls the placement of the Interrupt Vector table, see Code Exam-
ple below. For more details, see
Address Labels Code
.org 0x0002
0x00002
0x00004
...
0x00070
;
.org 0x1F000
0x1F000 RESET: ldi
0x1F001
0x1F002
0x1F003
0x1F004
0x1F005
Address
;
.org 0x1F000
0x1F000
0x1F002
0x1F004
...
0x1F070
;
0x1F072
0x1F073
0x1F074
0x1F075
0x1F076
0x1FO77
Labels Code
RESET: ldi
jmp
jmp
...
jmp
out
ldi
out
sei
<instr>
jmp
jmp
jmp
...
jmp
out
ldi
out
sei
<instr>
EXT_INT0
EXT_INT1
...
USART3_TXC
r16,high(RAMEND); Main program start
SPH,r16
r16,low(RAMEND)
SPL,r16
RESET
EXT_INT0
EXT_INT1
...
USART3_TXC
r16,high(RAMEND) ; Main program start
SPH,r16
r16,low(RAMEND)
SPL,r16
xxx
ATmega640/1280/1281/2560/2561
“Reset and Interrupt Handling” on page
xxx
Comments
; IRQ0 Handler
; IRQ1 Handler
;
; USART3 TX Complete Handler
; Set Stack Pointer to top of RAM
; Enable interrupts
Comments
; Reset handler
; IRQ0 Handler
; IRQ1 Handler
;
; USART3 TX Complete Handler
; Set Stack Pointer to top of RAM
; Enable interrupts
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