ATmega1281R231 Atmel Corporation, ATmega1281R231 Datasheet - Page 54

• Manufacturer Part Number: ATmega1281R231
• Manufacturer: Atmel Corporation

Specifications of ATmega1281R231

• Flash (kbytes): 128 Kbytes
• Max. Operating Frequency: 16 MHz
• Max I/o Pins: 54
• Spi: 3
• Twi (i2c): 1
• Uart: 2
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Crypto Engine: AES
• Sram (kbytes): 8
• Eeprom (bytes): 4096
• Operating Voltage (vcc): 1.8 to 3.6
• Timers: 6
• Frequency Band: 2.4 GHz
• Max Data Rate (mb/s): 2
• Antenna Diversity: Yes
• External Pa Control: Yes
• Power Output (dbm): 3
• Receiver Sensitivity (dbm): -101
• Receive Current Consumption (ma): 13.2
• Transmit Current Consumption (ma): 14.4
• Link Budget (dbm): 104

11.6
11.7
11.8
11.9
11.9.1
11.9.2
2549N–AVR–05/11
Standby Mode
Extended Standby Mode
Power Reduction Register
Minimizing Power Consumption
Analog to Digital Converter
Analog Comparator
stopped during sleep. If the Timer/Counter2 is not using the synchronous clock, the clock source
is stopped during sleep. Note that even if the synchronous clock is running in Power-save, this
clock is only available for the Timer/Counter2.
When the SM2:0 bits are 110 and an external crystal/resonator clock option is selected, the
SLEEP instruction makes the MCU enter Standby mode. This mode is identical to Power-down
with the exception that the Oscillator is kept running. From Standby mode, the device wakes up
in six clock cycles.
When the SM2:0 bits are 111 and an external crystal/resonator clock option is selected, the
SLEEP instruction makes the MCU enter Extended Standby mode. This mode is identical to
Power-save mode with the exception that the Oscillator is kept running. From Extended Standby
mode, the device wakes up in six clock cycles.
The Power Reduction Register (PRR), see
and
to individual peripherals to reduce power consumption.
Note that when the clock for a peripheral is stopped, then:
•
•
•
The peripheral should in most cases be disabled before stopping the clock. Waking up a mod-
ule, which is done by cleaning the bit in PRR, puts the module in the same state as before
shutdown. Module shutdown can be used in Idle mode or Active mode to significantly reduce the
overall power consumption. See
other sleep modes, the clock is already stopped.
There are several issues to consider when trying to minimize the power consumption in an AVR
controlled system. In general, sleep modes should be used as much as possible, and the sleep
mode should be selected so that as few as possible of the device’s functions are operating. All
functions not needed should be disabled. In particular, the following modules may need special
consideration when trying to achieve the lowest possible power consumption.
If enabled, the ADC will be enabled in all sleep modes. To save power, the ADC should be dis-
abled before entering any sleep mode. When the ADC is turned off and on again, the next
conversion will be an extended conversion. Refer to
page 275
When entering Idle mode, the Analog Comparator should be disabled if not used. When entering
ADC Noise Reduction mode, the Analog Comparator should be disabled. In other sleep modes,
the Analog Comparator is automatically disabled. However, if the Analog Comparator is set up
The current state of the peripheral is frozen
The associated registers can not be read or written
Resources used by the peripherals (for example I/O pin, etc.) will remain occupied
“PRR1 – Power Reduction Register 1” on page
for details on ADC operation.
ATmega640/1280/1281/2560/2561
“Power-down Supply Current” on page 392
“PRR0 – Power Reduction Register 0” on page 56
57, provides a method for stopping the clock
“ADC – Analog to Digital Converter” on
for examples. In all
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