ATmega1281R231 Atmel Corporation, ATmega1281R231 Datasheet - Page 188

• Manufacturer Part Number: ATmega1281R231
• Manufacturer: Atmel Corporation

Specifications of ATmega1281R231

• Flash (kbytes): 128 Kbytes
• Max. Operating Frequency: 16 MHz
• Max I/o Pins: 54
• Spi: 3
• Twi (i2c): 1
• Uart: 2
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Crypto Engine: AES
• Sram (kbytes): 8
• Eeprom (bytes): 4096
• Operating Voltage (vcc): 1.8 to 3.6
• Timers: 6
• Frequency Band: 2.4 GHz
• Max Data Rate (mb/s): 2
• Antenna Diversity: Yes
• External Pa Control: Yes
• Power Output (dbm): 3
• Receiver Sensitivity (dbm): -101
• Receive Current Consumption (ma): 13.2
• Transmit Current Consumption (ma): 14.4
• Link Budget (dbm): 104

2549N–AVR–05/11
Table 20-4.
Note:
• Bits 5:4 – COM2B1:0: Compare Match Output B Mode
These bits control the Output Compare pin (OC2B) behavior. If one or both of the COM2B1:0
bits are set, the OC2B output overrides the normal port functionality of the I/O pin it is connected
to. However, note that the Data Direction Register (DDR) bit corresponding to the OC2B pin
must be set in order to enable the output driver.
When OC2B is connected to the pin, the function of the COM2B1:0 bits depends on the
WGM22:0 bit setting.
are set to a normal or CTC mode (non-PWM).
Table 20-5.
Table 20-6
mode.
Table 20-6.
Note:
COM2A1
COM2B1
COM2B1
0
0
1
1
0
0
1
1
0
0
1
1
1. A special case occurs when OCR2A equals TOP and COM2A1 is set. In this case, the Com-
1. A special case occurs when OCR2B equals TOP and COM2B1 is set. In this case, the Com-
pare Match is ignored, but the set or clear is done at TOP. See
page 179
pare Match is ignored, but the set or clear is done at BOTTOM. See
page 178
shows the COM2B1:0 bit functionality when the WGM22:0 bits are set to fast PWM
Compare Output Mode, Phase Correct PWM Mode
Compare Output Mode, non-PWM Mode
Compare Output Mode, Fast PWM Mode
COM2A0
COM2B0
COM2B0
for more details.
for more details.
0
1
0
1
0
1
0
1
0
1
0
1
Table 20-5
ATmega640/1280/1281/2560/2561
shows the COM2B1:0 bit functionality when the WGM22:0 bits
WGM22 = 0: Normal Port Operation, OC2A Disconnected
Clear OC2B on Compare Match, set OC2B at BOTTOM
Set OC2B on Compare Match, clear OC2B at BOTTOM
Clear OC2A on Compare Match when down-counting
Set OC2A on Compare Match when down-counting
Clear OC2A on Compare Match when up-counting
Set OC2A on Compare Match when up-counting
WGM22 = 1: Toggle OC2A on Compare Match
Normal port operation, OC2A disconnected
Normal port operation, OC2B disconnected
Normal port operation, OC2B disconnected
Toggle OC2B on Compare Match
Clear OC2B on Compare Match
Set OC2B on Compare Match
(non-inverting mode)
(inverting mode)
(1)
Description
Description
Description
Reserved
(1)
“Phase Correct PWM Mode” on
“Fast PWM Mode” on
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