ED DDR3 1G PCF8000 Samsung Semiconductor, ED DDR3 1G PCF8000 Datasheet - Page 18

• Manufacturer Part Number: ED DDR3 1G PCF8000
• Manufacturer: Samsung Semiconductor
• Type: DDR3 SDRAMr

Specifications of ED DDR3 1G PCF8000

• Organization: 64Mx16
• Density: 1Gb
• Address Bus: 16b
• Access Time (max): 20ns
• Maximum Clock Rate: 1.066GHz
• Operating Supply Voltage (typ): 1.5V
• Package Type: FBGA
• Operating Temp Range: 0C to 95C
• Operating Supply Voltage (max): 1.575V
• Operating Supply Voltage (min): 1.425V
• Supply Current: 130mA
• Pin Count: 96
• Mounting: Surface Mount
• Operating Temperature Classification: Commercial
• Lead Free Status / Rohs Status: Compliant

K4B1G04(08/16)46E
8.4 Differential Input Cross Point Voltage
To guarantee tight setup and hold times as well as output skew parameters with respect to clock and strobe, each cross point voltage of differential input
signals (CK, CK and DQS, DQS) must meet the requirements in below table. The differential input cross point voltage V
cross point of true and complement signal to the mid level between of V
[ Table 12 ] Cross point voltage for differential input signals (CK, DQS)
Note :
1. Extended range for V
8.5 Slew rate definition for Differential Input Signals
See 14.3 "Address / Command Setup, Hold and Derating" for single-ended slew rate definitions for address and command signals.
See 14.4 "Data Setup, Hold and Slew Rate Derating" for single-ended slew rate definitions for data signals.tDH nominal slew rate for a falling signal is
8.6 Slew rate definition for Differential Input Signals
Input slew rate for differential signals (CK, CK and DQS, DQS) are defined and measured as shown in Table 13 and Figure 5.
[ Table 13 ] Differential input slew rate definition
Differential input slew rate for rising edge (CK-CK and DQS-DQS)
Differential input slew rate for falling edge (CK-CK and DQS-DQS)
Symbol
V
dard values.
SEH
V
V
IX
IX
of at least V
defined as the slew rate between the last crossing of V
Differential Input Cross Point Voltage relative to V
Differential Input Cross Point Voltage relative to V
DD
/2 =/-250 mV, and the differential slew rate of CK-CK is larger than 3 V/ ns. Refer to table 11 on page 17 for V
IX
is only allowed for clock and if single-ended clock input signals CKand CK are monotonic, have a single-ended swing V
Description
Figure 5. Differential Input Slew Rate definition for DQS, DQS and CK, CK
Parameter
V
IX
Figure 4. V
delta TFdiff
DD
DD
V
/2 for CK,CK
/2 for DQS,DQS
IH
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IX
(DC)min and the first crossing of V
IX
Definition
DD
and V
V
V
From
ILdiffmax
IHdiffmin
SS
V
Measured
IX
.
delta TRdiff
V
V
ILdiffmax
IHdiffmin
-150
-175
-150
Min
DDR3-800/1066/1333/1600
To
V
CK, DQS
V
CK, DQS
V
REF
V
0
V
DD
DD
SS
IHdiffmin
ILdiffmax
/2
1Gb DDR3 SDRAM
Rev. 1.0 February 2009
V
V
Max
150
175
150
IHdiffmin
IHdiffmin
IX
Delta TRdiff
Defined by
Delta TFdiff
is measured from the actual
- V
- V
ILdiffmax
ILdiffmax
SEL
Unit
mV
mV
mV
and V
SEH
Notes
stan-
SEL
1
/