PEB20534H-10V2.1 Infineon Technologies, PEB20534H-10V2.1 Datasheet - Page 150

• Manufacturer Part Number: PEB20534H-10V2.1
• Description: Communication Controller 208-Pin FQFP
• Manufacturer: Infineon Technologies

Figure 48
The common transmit and receive clock is supplied at pin RxCLK and the common frame
synchronisation signal at pin FSC. The "strobe signals" for active time slots are
generated internally by the time slot assigner block (TSA) independent in transmit and
receive direction.
When the transmit and receive PCM masks are enabled, bit fields ’TCC’ and ’RCC’ are
ignored because of the constant 8-bit time slot width.
Data Sheet
time slot
RxCLK
active
FSC
TTSA: Transmit Time Slot Assignment Register
31
TPCMM: Transmit PCM Mask Register
31
RTSA: Receive Time Slot Assignment Register
31
RPCMM: Receive PCM Mask Register
31
TS delay (transmit):
1 + TTSN*8 + TCS
(1...1024)
TS delay (receive):
1 + RTSN*8 + RCS
(1...1024)
RTSN
Selecting one or more time-slots of 8-bit width
TTSN
...
24 23
24 23
24 23
24 23
8 bit
TS0
Serial Communication Controller (SCC) Cores
RCS
TCS
17
1
TS1
150
16 15
16 15
16 15
16 15
1
1
TS2
TEPCM = '1': TPCM Mask Enabled
REPCM = '1': TPCM Mask Enabled
TS3
TS4
TS5
8 7
8 7
8 7
8 7
TS16 TS17
RCC
TCC
PEB 20534
PEF 20534
1
2000-05-30
3
0
0
0
0