TXC-06101AILQ Transwitch Corporation, TXC-06101AILQ Datasheet - Page 80

• Manufacturer Part Number: TXC-06101AILQ
• Manufacturer: Transwitch Corporation

Specifications of TXC-06101AILQ

• Operating Temperature (min): -40C
• Operating Temperature Classification: Industrial
• Operating Temperature (max): 85C
• Package Type: PQFP
• Rad Hardened: No
• Lead Free Status / Rohs Status: Not Compliant

Address [H]
0CD-0CF
0DD-0DF
0D5-0D7
0E5-0E7
0CC
0DB
0DC
0D0
0D1
0D2
0D3
0D4
0D8
0D9
0DA
0E0
0E1
0E2
0E3
0E4
Proprietary TranSwitch Corporation Information for use Solely by its Customers
RPFEBEOF
Status Bits
RB3COF
RPNEW
RPNEW
RPNEW
Control Bits
CNT16EN
CNT16EN
RSWRES
RSWRES
RPATH
Internal Use - Do Not Access
Rx Insert (Z3, Z4 and Z5): bytes to be multiplexed into Rx Terminal Port
Data if insertion option is enabled where : OCD[H] = Z3 and 0CF[H] = Z5
Rx B3 Error Mask: the contents of this location are exclusive-OR gated,
bit by bit, with the B3 Byte output at the Rx Terminal Port.
Debounced C2: the Debounce Algorithm is the same as used for TOH
Debouncing (see 05A[H] to 05F[H] above).
FEBE-P Count: count of FEBE-P Errors that are incoming on the Rx
Line. This is an 8 or 16-Bit, Clear on Read, Saturating Counter. In 8-Bit
Mode, the total counter value is available at this location. In 16-Bit Mode
this location is the Lower Order 8 Bits. The Higher Order 8 Bits are read-
able in Location 1FF[H]. The Lower Order Byte must be Read first in 16-
Bit Mode. Counting is inhibited upon declaration of RLOC, RLOS, RLOF,
RAIS-L, RLOP , or RAIS-P .
Debounced F2: the Debounce Algorithm is the same as used for TOH
Debouncing (see 05A[H] to 05F[H] above).
Rx B3 Error Count: count of B3 Errors that are incoming on the Rx
Line. This is an 8 or 16-Bit, Clear on Read, Saturating Counter. In 8-Bit
Mode the total counter value is available at this location. In 16-Bit Mode
this location is the Lower Order 8 Bits. The Higher Order 8 Bits are read-
able in Location 1FF[H]. The Lower Order Byte must be Read first in 16-
Bit Mode. Counting is inhibited upon declaration of RLOC, RLOS, RLOF,
RAIS-L, RLOP , or RAIS-P .
Debounced (Z3, Z4 and Z5): where : OD5[H] = Z3 and 0D7[H] = Z5.
The Debounce Algorithm is the same as used for TOH Debouncing (see
05A[H] to 05F[H] above).
Internal Use - Do Not Access
Frm-1 C2: C2 Byte received in the previous frame
Internal Use - Do Not Access
Frm-1 F2: F2 Byte received in the previous frame
Internal Use - Do Not Access
Frm-1 (Z3, Z4 and Z5): respective bytes received in the previous frame
where : 0DD[H] = Frm-1 Z3 and 0DF[H] = Frm-1 Z5
Internal Use - Do Not Access
Frm-2 C2: C2 Byte received two frames earlier
Internal Use - Do Not Access
Frm-2 F2: F2 Byte received two frames earlier
C2 Expect: value with which Rx Line C2 Location is compared for Signal
Label Mismatch
Frm-2 (Z3, Z4 and Z5): respective bytes received two frames earlier
where : 0E5[H] = Frm-2 Z3 and 0E7[H] = Frm-2 Z5
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DATA SHEET
Description
TXC-06101
Ed. 3, April 2001
TXC-06101-MB
PHAST-1