TXC-06101AILQ Transwitch Corporation, TXC-06101AILQ Datasheet - Page 26

• Manufacturer Part Number: TXC-06101AILQ
• Manufacturer: Transwitch Corporation

Specifications of TXC-06101AILQ

• Operating Temperature (min): -40C
• Operating Temperature Classification: Industrial
• Operating Temperature (max): 85C
• Package Type: PQFP
• Rad Hardened: No
• Lead Free Status / Rohs Status: Not Compliant

Pin Name
TPDVI0
TPDVI1
TPDVO
TTCI/O
MBEI
TTDI
Proprietary TranSwitch Corporation Information for use Solely by its Customers
Pin No.
132
118
120
11
2
8
I/O/P(T)
I/O
O
I
I
I
I
CMOS/
CMOS
TTLp
TTLp
TTLp
Type
CT4
CT8
- 26 of 196 -
DATA SHEET
Terminal Parallel Data Valid Output: Active Low Sig-
nal that indicates that TPDO(0-7), RSPE, RSYN and
TPARO are driving the parallel bus. In 6.48 Mbyte/s
applications it will always be Low. When the bus is oper-
ating at 19.44 Mbyte/s the settings of ENFSTUA, ENL-
STUA, MBSEL0 and MBSEL1 will determine when this
pin is active.
Terminal Parallel Data Valid Input x: Active Low sig-
nals that are used for bus collision protection when the
19.44 Mbyte/s operating mode is selected. They are
connected to the TPDVO outputs of other devices.
A priority scheme can be implemented by:
1. Providing no inputs to the highest priority device
2. Providing one input to the middle priority device
3. Providing two inputs to the lowest priority device.
Another collision protection scheme can be imple-
mented by connecting the TPDVO output of each device
to either the TPDVI0 or TPDVI1 inputs of the other
device(s).
The advantage of implementing either type of collision
protection scheme is to avoid signal contention when
two or three devices are incorrectly programmed for the
same time slot. (Also see RBUSCOL, Status Register 1,
bit 1).
While TPDVI0 and TPDVI1 are high the TPDO(0-7),
RSPE, RSYN, and TPARO parallel bus is driven when
operating in the 6.48 Mbyte/s mode, or in the 19.44
Mbyte/s mode if programmed by MBSEL0, MBSEL1,
ENFSTUA, and ENLSTUA. The parallel bus is tri-stated
when either or both TPDVI0 or TDPVI1 are low in either
the 6.48 Mbyte/s or 19.44 Mbyte/s mode.
Multiplex Bus Enable Input: Active Low signal that
enables 19.44 Mbtye/s bus operation.
Transmit Terminal Clock Input/Output: Serial, 51.84
MHz terminal clock. In SONET and SPE-only Modes it
is an Input. In Datacom Mode it is an Output derived
from DRCI. Since it is possible for the device to power
up with this pin as an output, a reset should be per-
formed via pin RST to ensure correct operation.
Transmit Terminal Data Input: Serial, 51.84 Mbit/s
data. Data is clocked in on the Rising Edges of TTCI/O.
Name/Function
TXC-06101
Ed. 3, April 2001
TXC-06101-MB
PHAST-1