TXC-06101AILQ Transwitch Corporation, TXC-06101AILQ Datasheet - Page 21

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TXC-06101AILQ

Manufacturer Part Number
TXC-06101AILQ
Description
Manufacturer
Transwitch Corporation
Datasheet

Specifications of TXC-06101AILQ

Operating Temperature (min)
-40C
Operating Temperature Classification
Industrial
Operating Temperature (max)
85C
Package Type
PQFP
Rad Hardened
No
Lead Free Status / Rohs Status
Not Compliant

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Proprietary TranSwitch Corporation Information for use Solely by its Customers
PHAST-1
DATA SHEET
TXC-06101
The Rx POH Processor Distributes and Processes the POH Bytes. All bytes are stored in RAM and available
at the Rx POH Port. Selected POH Bytes are debounced. B3 and FEBE-P error counts are accumulated. Path
Level Alarms are reported to the µPro Interface. AIS-P conditions are output at the Alarm Port.
The Rx Ring Port is for use with a mated PHAST-1 in PPS Ring Operations. The information output consists of
FEBE (Line and Path) values and Send RDI (Line and Path) indications.
The Terminal Timing Generator and Rx Re-timing FIFO are used to justify the STS-1 SPE to a Rx Reference
Frequency. In certain modes of operation the Re-timing Function can be bypassed. The Reference Frequency
may be derived from the Rx Line or from an External Reference Source. The Rx Re-timing FIFO Block per-
forms Frequency Justification and Pointer Re-calculation.
The Rx Terminal Generator and Rx Terminal Port create and format the received Signal appearing at the Rx
Terminal Port outputs. The Section and Line Overhead Bytes (not applicable in SPE-only Mode) appearing at
the output may be taken from RAM, generated internally, or input at the ISC Port. The POH bytes are taken
from RAM or internally generated. The Rx Terminal Generator generates the required bytes and performs
Alarm Insertion.
TRANSMIT SIDE
The data to be transmitted enters the PHAST-1 at the Tx Terminal Port. The Tx Terminal Clock and Control Sig-
nals are generated and output by the PHAST-1 in Datacom Mode and are inputs for all other modes. The TOH
bytes (not applicable in SPE-only Mode) are extracted and output at the ISC Port.
The Multiplexer at the input to the Tx Terminal Processor selects either the Tx Terminal Port Data or the looped
signal from the Rx Terminal Generator. The Tx Terminal Processor performs Frame Delineation, Pointer Track-
ing, stores all TOH (if present) and POH Bytes in RAM, accumulates B1, B2 and B3 errors, and detects Termi-
nal Side Alarms. The payload portion of the STS-1 SPE is forwarded to the Tx Re-Timing FIFO.
The Line Timing Generator and Tx Re-timing FIFO are used to justify the STS-1 SPE to a Tx Reference Fre-
quency. In certain modes of operation the Re-timing Function can be bypassed. The Reference Frequency
may be derived from the Tx Terminal or from an External Reference Source. The Tx Re-timing FIFO performs
Frequency Justification and Pointer Recalculation.
The Tx OH Generator is responsible for Section, Line and Path Overhead Byte Assembly, TOH and POH Level
Alarm Insertion, and scrambling. The POH bytes may be selected from RAM or input at the Tx POH Port.
Alarms are generated as a result of Rx Side anomalies, Terminal Side conditions, Alarm Port Input, Tx Ring
Port Input or upon command from the µPro Interface. The TOH Bytes are either internally generated, taken
from RAM, or input externally. The external sources for the TOH Bytes are the Tx E
-K
/TOH Port, the Tx Line
X
x
DCC Port, or the Tx Section DCC Port. Alarms are generated as a result of Rx Side anomalies, Terminal Side
conditions, Alarm Port Input, Tx Ring Port Input or upon command from the µPro Interface. The Tx Line Output
consists of either the Tx OH Generator Output or the looped Received Line Signal.
- 21 of 196 -
TXC-06101-MB
Ed. 3, April 2001

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