DK-SI-5SGXEA7/ES Altera, DK-SI-5SGXEA7/ES Datasheet - Page 179

• Manufacturer Part Number: DK-SI-5SGXEA7/ES
• Description: KIT DEV STRATIX V FPGA 5SGXEA7
• Manufacturer: Altera
• Series: Stratix® Vr
• Type: FPGAr

Specifications of DK-SI-5SGXEA7/ES

• Contents: Board
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• For Use With/related Products: Stratix® V 5SGXEA7
• Other names: 544-2724

Chapter 5: I/O Features in Stratix V Devices
I/O Standard Support
Table 5–2. Stratix V I/O Standards and Voltage Levels
May 2011 Altera Corporation
3.3-V LVTTL
3.3-V LVCMOS
2.5-V LVCMOS
1.8-V LVCMOS
1.5-V LVCMOS
1.2-V LVCMOS
SSTL-2 Class I
SSTL-2 Class II
SSTL-18 Class I
SSTL-18 Class II
SSTL-15 Class I
SSTL-15 Class II
SSTL-15
SSTL-135
SSTL-125
SSTL-12
HSTL-18 Class I
HSTL-18 Class II
HSTL-15 Class I
HSTL-15 Class II
HSTL-12 Class I
HSTL-12 Class II
HSUL-12
Differential SSTL-2 Class I
Differential SSTL-2 Class II
Differential SSTL-18 Class I
I/O Standards and Voltage Levels
I/O Standard
(2)
(2)
Table 5–1. Stratix V I/O Standards and Applications (Part 2 of 2)
Table 5–2
board V
mini-LVDS
LVPECL
Notes to
(1) The 3.3-V LVTTL/LVCMOS I/O standard is supported using V
(2) This I/O standard is only supported in Stratix V GX and GS devices.
Table
TT
lists the supported I/O standards and typical V
Standard Support
values for input and output.
JESD79-3D
5–1:
JESD8-16A
JESD8-16A
JESD8-11
JESD8-12
JESD8-9B
JESD8-9B
JESD8-15
JESD8-15
JESD8-9B
JESD8-9B
JESD8-15
JESD8-B
JESD8-B
JESD8-5
JESD8-7
JESD8-6
JESD8-6
JESD8-6
JESD8-6
I/O Standard
—
—
—
—
—
—
(Note 1)
Operation
3.0/2.5
3.0/2.5
3.0/2.5
1.8/1.5
1.8/1.5
Input
1.2
(3)
(3)
(3)
(3)
(3)
(3)
(3)
(3)
(3)
(3)
(3)
(3)
(3)
(3)
(3)
(3)
(3)
(3)
(3)
(3)
Stratix V Device Handbook Volume 2: Device Interfaces and Integration
V
(Part 1 of 2)
CCIO
(V)
Operation
Output
1.35
1.25
3.0
3.0
2.5
1.8
1.5
1.2
2.5
2.5
1.8
1.8
1.5
1.5
1.5
1.2
1.8
1.8
1.5
1.5
1.2
1.2
1.2
2.5
2.5
1.8
CCIO
Video graphics and clock distribution
at 3.0 V.
(Pre-Driver
V
Voltage)
CCPD
Typical Applications
3.0
3.0
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
Flat panel display
CCIO
(V)
, V
(Input Ref
CCPD
Voltage)
V REF
0.675
0.625
1.25
1.25
0.90
0.90
0.75
0.75
0.75
0.90
0.90
0.75
0.75
0.6
0.6
0.6
0.6
—
—
—
—
—
—
—
—
—
(V)
, V
REF
Termination
, and
Voltage)
(Board
V TT
1.25
1.25
0.90
0.90
0.75
0.75
0.90
0.90
0.75
0.75
1.25
1.25
0.90
0.6
0.6
—
—
—
—
—
—
(4)
(4)
(4)
(4)
(4)
(V)
5–3