TSI148-133IL IDT, Integrated Device Technology Inc, TSI148-133IL Datasheet - Page 195

IC PCI-VME BRIDGE 456PBGA

TSI148-133IL

Manufacturer Part Number
TSI148-133IL
Description
IC PCI-VME BRIDGE 456PBGA
Manufacturer
IDT, Integrated Device Technology Inc
Series
Tsi148&Trade;r
Datasheets

Specifications of TSI148-133IL

Applications
PCI-to-VME Bridge
Interface
PCI
Voltage - Supply
3.3V
Package / Case
456-PBGA
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
800-1905

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10.3
Tsi148 PCI/X-to-VME Bus Bridge User Manual
80A3020_MA001_13
Register Endian Mapping
The VMEbus uses Big-Endian byte ordering and the PCI/X bus uses Little-Endian byte
ordering. The byte ordering differences are accommodated by swapping the data in the PCI/X
Master and PCI/X Target before it is passed to the Linkage Module. Data transferred between
the PCI/X bus and the Linkage Module is swapped as shown in
handling the endian problem is called address invariance. If data is accessed using byte
operations, little endian and big endian processors view the same data. If data is accessed
using 32-bit accesses, little endian and big endian processors see different views of the same
data.
Figure 37: Big to Little Endian Data Swap
When viewed from the VMEbus, the LCSR, GCSR and CR/CSR registers appear as
presented in the programming section. When viewed from the VMEbus, the PCFS registers
appear swapped.
D7
D7
D0
D6
D6
D1
D5
D5
D0
D4
D2
D4
D4
D1
D5
D3
D3
D3
D2
D6
D4
D2
D2
D3
D7
D5
D1
D1
32-bit PCI/X
D6
D0
D0
D7
10. Registers > Register Endian Mapping
Figure
64-bit PCI/X
Linkage
Linkage
37. This method of
195

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