TSI148-133IL IDT, Integrated Device Technology Inc, TSI148-133IL Datasheet - Page 138
TSI148-133IL
Manufacturer Part Number
TSI148-133IL
Description
IC PCI-VME BRIDGE 456PBGA
Manufacturer
IDT, Integrated Device Technology Inc
Series
Tsi148&Trade;r
Datasheets
1.TSI148-133CL.pdf
(391 pages)
2.TSI148-133CL.pdf
(2 pages)
3.TSI148-133CL.pdf
(12 pages)
Specifications of TSI148-133IL
Applications
PCI-to-VME Bridge
Interface
PCI
Voltage - Supply
3.3V
Package / Case
456-PBGA
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
800-1905
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7. JTAG Module > Overview of JTAG
7.1
7.2
138
Overview of JTAG
Tsi148 has a dedicated user-accessible JTAG (Joint Test Action Group) module that is fully
compatible with the IEEE 1149.1 Standard Test Access Port and Boundary-Scan Architecture.
The JTAG logic includes a Test Access Port (TAP) consisting of five dedicated signals (TCK,
TRST_, TMS, TDI, TDO), a TAP controller, instruction register, bypass register, other test
data registers (for example, device identity register, etc.), and boundary-scan register (see
Figure
Figure 32: JTAG Functional Diagram
Instructions
Tsi148’s IEEE 1149.1 implementation includes the following instructions:
•
EXTEST: This instruction drives the data loaded into the boundary scan register through
the output pin to drive another chip with the value loaded in the boundary scan cell by the
SAMPLE/PRELOAD instruction. At the same time, this instruction also captures the
data at the inputs. This process is useful for board interconnect testing.
32).
Test Data
Registers
Other
Multiplexer
Boundary Scan Cell
Register
Bypass
Instruction
Register
Multiplexer
Boundary Scan Path
Controller
Tsi148 PCI/X-to-VME Bus Bridge User Manual
TAP
TRST_
TMS
TCK
TDO
TDI
Test Access
Port (TAP)
80A3020_MA001_13
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