DS1878T+T&R Maxim Integrated Products, DS1878T+T&R Datasheet - Page 93

• Manufacturer Part Number: DS1878T+T&R
• Description: IC CTLR SFP W/DGTL LDD RX 28TQFN
• Manufacturer: Maxim Integrated Products
• Type: SFP+ Controllerr

Specifications of DS1878T+T&R

• Input Type: *
• Output Type: *
• Interface: *
• Current - Supply: *
• Mounting Type: Surface Mount
• Package / Case: 28-WFQFN exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Table 02h, Register FEh–FFh: RESERVED
Table 04h, Register 80h–C7h: MODULATION LUT
80h–C7h
SFP+ Controller with Digital LDD Interface
FACTORY DEFAULT
READ ACCESS
WRITE ACCESS
MEMORY TYPE
These registers are reserved.
FACTORY DEFAULT
READ ACCESS
WRITE ACCESS
MEMORY TYPE
The digital value for the modulation DAC output. The MODULATION LUT is a set of registers assigned to hold the
temperature profile for the MODULATION register. The temperature measurement is used to index the LUT
(TINDEX, Table 02h, Register 81h) in 2°C increments from -40°C to +102°C, starting at 80h. Register 80h defines
the -40°C to -38°C MOD output, Register 81h defines the -38°C to -36°C MOD output, and so on. Values recalled
from this EEPROM memory table are written into the MODULATION register (Table 02h, Register 82h–83h)
location that holds the value until the next temperature conversion. The device can be placed into a manual
mode (MOD EN bit, Table 02h, Register 80h), where the MODULATION register is directly controlled for
calibration. If the temperature compensation functionality is not required, then program the entire Table 04h to the
desired modulation setting. The MODTC bit determines whether the 8-bit LUT values are loaded into the upper 8
bits or lower 8 bits of the 9-bit MOD DAC. See the BIAS and MODULATION Control During Power-Up section for
more information.
BIT 7
______________________________________________________________________________________
2
7
2
6
00h
PW2 or (PW1 and RWTBL246) or (PW1 and RTBL246)
PW2 or (PW1 and RWTBL246)
Nonvolatile (EE)
00h
N/A
N/A
Nonvolatile (SEE)
2
5
2
4
2
3
Table 04h Register Description
2
2
2
1
BIT 0
2
0
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