DS1878T+T&R Maxim Integrated Products, DS1878T+T&R Datasheet - Page 20

• Manufacturer Part Number: DS1878T+T&R
• Description: IC CTLR SFP W/DGTL LDD RX 28TQFN
• Manufacturer: Maxim Integrated Products
• Type: SFP+ Controllerr

Specifications of DS1878T+T&R

• Input Type: *
• Output Type: *
• Interface: *
• Current - Supply: *
• Mounting Type: Surface Mount
• Package / Case: 28-WFQFN exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

is timed (within 500µs) to go to 0, at which point the
part is fully functional.
For all device addresses sourced from EEPROM (Table
02h, Register 8Ch), the default device address is A2h
until V
be recalled from the EEPROM.
POA holds the device in reset until V
level (V
with its ADC and compare analog signals with its quick-
SFP+ Controller with Digital LDD Interface
Figure 11. Recommended RC Filter for DAC1/DAC2
Figure 12. Delta-Sigma Outputs
20
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DS1878
DS1878
CC
CC
O
1
2
3
4
5
6
7
exceeds POA, allowing the device address to
DAC
DAC
> POA) for the device to accurately measure
3.24kΩ
1kΩ
Power-On Analog (POA)
0.01μF
0.1μF
3.24kΩ
1kΩ
0.01μF
0.1μF
CC
VOLTAGE OUTPUT
is at a suitable
2kΩ
CURRENT SINK
trip monitors. Because V
ADC when V
VCC LO alarm, which is cleared by a V
sion greater than the customer-programmable VCC LO
ADC limit. This allows a programmable limit to ensure
that the headroom requirements of the transceiver are
satisfied during a slow power-up. The TXFOUT output
does not latch until there is a conversion above the
VCC LO limit. The POA alarm is nonmaskable. The TXF
output is asserted when V
Low-Voltage Operation section for more information.
Two delta-sigma outputs are provided, DAC1 and
DAC2. With the addition of an external RC filter, these
outputs provide two 9-bit resolution analog outputs with
the full-scale range set by the input REFIN. Each output
is either manually controlled or controlled using a tem-
perature-indexed LUT. A delta-sigma is a digital output
using pulse-density modulation. It provides much lower
output ripple than a standard digital PWM output given
the same clock rate and filter components. Before t
the DAC1 and DAC2 outputs are high impedance.
The external RC filter components are chosen based
on ripple requirements, output load, delta-sigma fre-
quency, and desired response time. A recommended
filter is shown in Figure 11.
The device’s delta-sigma outputs are 9 bits. For illustra-
tive purposes, a 3-bit example is provided in Figure 12.
Delta-Sigma Outputs (DAC1 and DAC2)
CC
is less than POA, POA also asserts the
CC
CC
cannot be measured by the
is below POA. See the
CC
ADC conver-
INIT
,