STM32W108C8U64TR STMicroelectronics, STM32W108C8U64TR Datasheet - Page 97

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STM32W108C8U64TR

Manufacturer Part Number
STM32W108C8U64TR
Description
16/32-BITS MICROS
Manufacturer
STMicroelectronics
Series
STM32r
Datasheet

Specifications of STM32W108C8U64TR

Applications
RF4CE, Remote Control
Core Processor
ARM® Cortex-M3™
Program Memory Type
FLASH (64 kB)
Controller Series
STM32W
Ram Size
8K x 8
Interface
I²C, SPI, UART/USART
Number Of I /o
24
Voltage - Supply
1.18 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
48-VFQFN Exposed Pad
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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0
STM32W108C8
9.13
9.13.1
15
31
15
14
30
14
Bits [0] SC_UARTFRAC: The fractional part of the baud rate period (F) in the equation:
DMA channel registers
Serial DMA control register (SCx_DMACTRL)
Address offset: 0xC830 (SC1_DMACTRL) and 0xC030 (SC2_DMACTRL)
Reset value:
Bit 5 SC_TXDMARST: Setting this bit resets the transmit DMA. The bit clears automatically.
Bit 4 SC_RXDMARST: Setting this bit resets the receive DMA. The bit clears automatically.
Bit 3 SC_TXLODB: Setting this bit loads DMA transmit buffer B addresses and allows the DMA
Bit 2 SC_TXLODA: Setting this bit loads DMA transmit buffer A addresses and allows the DMA
13
29
13
controller to start processing transmit buffer B. If both buffer A and B are loaded simultaneously,
buffer A will be used first. This bit is cleared when DMA completes. Writing a zero to this bit has
no effect.
Reading this bit returns DMA buffer status:
0: DMA processing is complete or idle.
1: DMA processing is active or pending.
controller to start processing transmit buffer A. If both buffer A and B are loaded simultaneously,
buffer A will be used first. This bit is cleared when DMA completes. Writing a zero to this bit has
no effect.
Reading this bit returns DMA buffer status:
0: DMA processing is complete or idle.
1: DMA processing is active or pending.
Rate = 24 MHz / ( (2 * N) + F )
12
28
12
11
27
11
Reserved
0x0000 0000
10
26
10
25
9
9
Doc ID 018587 Rev 1
Reserved
24
8
8
Reserved
23
7
7
22
6
6
DMARS
SC_TX
21
T
w
5
5
XDMA
SC_R
RST
20
w
4
4
SC_TX
LODB
19
rw
3
3
SC_TX
LODA
Serial interfaces
18
rw
2
2
SC_RX
LODB
17
rw
1
1
97/207
SC_UA
RTFRA
SC_RX
LODA
rw
16
rw
C
0
0

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