STM32W108C8U64TR STMicroelectronics, STM32W108C8U64TR Datasheet - Page 102
STM32W108C8U64TR
Manufacturer Part Number
STM32W108C8U64TR
Description
16/32-BITS MICROS
Manufacturer
STMicroelectronics
Series
STM32r
Datasheet
1.STM32W108C8U63TR.pdf
(207 pages)
Specifications of STM32W108C8U64TR
Applications
RF4CE, Remote Control
Core Processor
ARM® Cortex-M3™
Program Memory Type
FLASH (64 kB)
Controller Series
STM32W
Ram Size
8K x 8
Interface
I²C, SPI, UART/USART
Number Of I /o
24
Voltage - Supply
1.18 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
48-VFQFN Exposed Pad
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
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Serial interfaces
9.13.11
9.13.12
9.13.13
102/207
31
15
31
15
31
15
Reserved
Reserved
Reserved
30
14
30
14
30
14
Bits [12:0] SC_RXENDA: Address of the last byte that will be written in the DMA receive buffer A.
Bits [12:0] SC_RXENDB: Address of the last byte that will be written in the DMA receive buffer B.
Bits [12:0] SC_RXCNTA: The offset from the start of DMA receive buffer A at which the next byte will be
Receive DMA end address register B (SCx_RXENDB)
Address offset: 0xC80C (SC1_RXENDB) and 0xC00C (SC2_RXENDB)
Reset value:
Receive DMA count register A (SCx_RXCNTA)
Address offset: 0xC820 (SC1_RXCNTA) and 0xC020 (SC2_RXCNTA)
Reset value:
Receive DMA count register B (SCx_RXCNTB)
Address offset: 0xC824 (SC1_RXCNTB) and 0xC024 (SC2_RXCNTB)
Reset value:
29
13
29
13
29
13
written. This register is set to zero when the buffer is loaded and when the DMA is reset. If this
register is written when the buffer is not loaded, the buffer is loaded.
28
12
28
12
28
12
27
11
27
11
27
11
0x2000 0000
0x0000 0000
0x0000 0000
26
10
26
10
26
10
25
25
25
9
9
9
Doc ID 018587 Rev 1
24
24
24
8
8
8
Reserved
Reserved
Reserved
23
23
23
7
7
7
SC_RXENDB
SC_RXCNTB
SC_RXCNTA
22
22
22
6
6
6
rw
rw
rw
21
21
21
5
5
5
20
20
20
4
4
4
19
19
19
3
3
3
18
18
18
2
2
2
STM32W108C8
17
17
17
1
1
1
16
16
16
0
0
0
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