Si5369-EVB Silicon Laboratories Inc, Si5369-EVB Datasheet - Page 59

MCU, MPU & DSP Development Tools SI5369 DEV KIT

Si5369-EVB

Manufacturer Part Number
Si5369-EVB
Description
MCU, MPU & DSP Development Tools SI5369 DEV KIT
Manufacturer
Silicon Laboratories Inc
Datasheets

Specifications of Si5369-EVB

Processor To Be Evaluated
Si5369
Interface Type
I2C, SPI
Operating Supply Voltage
3.3 V
Lead Free Status / Rohs Status
 Details
Reset value = 0000 0001
Register 130.
Name
Type
Bit
Bit
7
6
5
4
3
2
1
0
DIGHOLDVALID Digital Hold Valid.
D7
FOS4_INT
FOS3_INT
FOS2_INT
FOS1_INT
R
Reserved
Reserved
LOL_INT
Name
DIGHOLDVALID
D6
R
Indicates if the digital hold circuit has enough samples of a valid clock to meet digital
hold specifications.
0: Indicates digital filter has not been filled. The digital hold output frequency (from the
filter) is not valid.
1: Indicates digital hold filter has been filled. The digital hold output frequency is valid.
FOS4_INT.
CKIN4 Frequency Offset Status.
0: Normal operation.
1: Internal frequency offset alarm on CKIN4 input.
FOS3_INT.
CKIN3 Frequency Offset Status.
0: Normal operation.
1: Internal frequency offset alarm on CKIN3 input.
FOS2_INT.
CKIN2 Frequency Offset Status.
0: Normal operation.
1: Internal frequency offset alarm on CKIN2 input.
FOS1_INT.
CKIN1 Frequency Offset Status.
0: Normal operation.
1: Internal frequency offset alarm on CKIN1 input.
LOL_INT.
PLL Loss of Lock Status.
0: PLL locked.
1: PLL unlocked.
D5
R
Preliminary Rev. 0.4
FOS4_INT FOS3_INT FOS2_INT
D4
R
Function
D3
R
D2
R
FOS1_INT
D1
R
LOL_INT
D0
R
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