IDT82P2282PFG8 IDT, Integrated Device Technology Inc, IDT82P2282PFG8 Datasheet - Page 4
![no-image](/images/manufacturer_photos/0/3/324/idt__integrated_device_technology_inc_sml.jpg)
IDT82P2282PFG8
Manufacturer Part Number
IDT82P2282PFG8
Description
TXRX T1/J1/E1 2CHAN 100-TQFP
Manufacturer
IDT, Integrated Device Technology Inc
Type
Transceiverr
Datasheet
1.IDT82P2282PF8.pdf
(381 pages)
Specifications of IDT82P2282PFG8
Number Of Drivers/receivers
2/2
Protocol
IEEE 1149.1
Voltage - Supply
3 V ~ 3.6 V
Mounting Type
Surface Mount
Package / Case
100-TQFP, 100-VQFP
Screening Level
Industrial
Pin Count
100
Mounting
Surface Mount
Package Type
TQFP
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
82P2282PFG8
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
IDT82P2282PFG8
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
- Current page: 4 of 381
- Download datasheet (3Mb)
IDT82P2282
Table of Contents
3.9 PERFORMANCE MONITOR ......................................................................................................................................................................... 49
3.10 ALARM DETECTOR ..................................................................................................................................................................................... 53
3.11 HDLC RECEIVER .......................................................................................................................................................................................... 56
3.12 BIT-ORIENTED MESSAGE RECEIVER ....................................................................................................................................................... 59
3.13 INBAND LOOPBACK CODE DETECTOR (T1/J1 ONLY) ............................................................................................................................ 59
3.14 ELASTIC STORE BUFFER ........................................................................................................................................................................... 60
3.15 RECEIVE CAS/RBS BUFFER ...................................................................................................................................................................... 60
3.16 RECEIVE PAYLOAD CONTROL .................................................................................................................................................................. 63
3.17 RECEIVE SYSTEM INTERFACE .................................................................................................................................................................. 65
3.18 TRANSMIT SYSTEM INTERFACE ............................................................................................................................................................... 73
3.9.1
3.9.2
3.10.1 T1/J1 Mode ...................................................................................................................................................................................... 53
3.10.2 E1 Mode .......................................................................................................................................................................................... 55
3.11.1 HDLC Channel Configuration ........................................................................................................................................................ 56
3.11.2 HDLC Mode ..................................................................................................................................................................................... 56
3.15.1 T1/J1 Mode ...................................................................................................................................................................................... 60
3.15.2 E1 Mode .......................................................................................................................................................................................... 61
3.17.1 T1/J1 Mode ...................................................................................................................................................................................... 65
3.17.2 E1 Mode .......................................................................................................................................................................................... 70
3.18.1 T1/J1 Mode ...................................................................................................................................................................................... 73
3.18.2 E1 Mode .......................................................................................................................................................................................... 79
3.8.2.4
3.8.2.5
T1/J1 Mode ...................................................................................................................................................................................... 49
E1 Mode .......................................................................................................................................................................................... 51
3.17.1.1 Receive Clock Master Mode ............................................................................................................................................ 65
3.17.1.2 Receive Clock Slave Mode .............................................................................................................................................. 66
3.17.1.3 Receive Multiplexed Mode ............................................................................................................................................... 67
3.17.1.4 Offset ................................................................................................................................................................................ 67
3.17.1.5 Output On RSDn/MRSD & RSIGn/MRSIG ....................................................................................................................... 70
3.17.2.1 Receive Clock Master Mode ............................................................................................................................................ 70
3.17.2.2 Receive Clock Slave Mode .............................................................................................................................................. 70
3.17.2.3 Receive Multiplexed Mode ............................................................................................................................................... 71
3.17.2.4 Offset ................................................................................................................................................................................ 71
3.17.2.5 Output On RSDn/MRSD & RSIGn/MRSIG ....................................................................................................................... 71
3.18.1.1 Transmit Clock Master Mode ............................................................................................................................................ 73
3.18.1.2 Transmit Clock Slave Mode ............................................................................................................................................. 74
3.18.1.3 Transmit Multiplexed Mode .............................................................................................................................................. 75
3.18.1.4 Offset ................................................................................................................................................................................ 76
3.18.2.1 Transmit Clock Master Mode ............................................................................................................................................ 79
3.18.2.2 Transmit Clock Slave Mode ............................................................................................................................................. 79
3.18.2.3 Transmit Multiplexed Mode .............................................................................................................................................. 80
3.8.2.3.3
3.8.2.3.4
3.8.2.3.5
3.8.2.3.6
3.8.2.3.7
V5.2 Link .......................................................................................................................................................................... 47
Interrupt Summary ............................................................................................................................................................ 47
3.17.1.1.1 Receive Clock Master Full T1/J1 Mode ......................................................................................................... 65
3.17.1.1.2 Receive Clock Master Fractional T1/J1 Mode ............................................................................................... 66
3.17.2.1.1 Receive Clock Master Full E1 Mode ............................................................................................................. 70
3.17.2.1.2 Receive Clock Master Fractional E1 Mode ................................................................................................... 70
3.18.1.1.1 Transmit Clock Master Full T1/J1 Mode ........................................................................................................ 73
3.18.1.1.2 Transmit Clock Master Fractional T1/J1 Mode .............................................................................................. 73
3.18.2.1.1 Transmit Clock Master Full E1 Mode ............................................................................................................ 79
3.18.2.1.2 Transmit Clock Master Fractional E1 Mode .................................................................................................. 79
National Bit Extraction ................................................................................................................................... 46
National Bit Codeword Extraction .................................................................................................................. 46
Extra Bit Extraction ........................................................................................................................................ 46
Remote Signaling Multi-Frame Alarm Indication Bit Extraction ..................................................................... 46
Sa6 Code Detection Per ETS 300 233 .......................................................................................................... 46
4
DUAL T1/E1/J1 LONG HAUL / SHORT HAUL TRANSCEIVER
August 20, 2009
Related parts for IDT82P2282PFG8
Image
Part Number
Description
Manufacturer
Datasheet
Request
R
![IDT77010L155PQF](/images/manufacturer_photos/0/3/324/idt__integrated_device_technology_inc_tmb.jpg)
Part Number:
Description:
TRANSLATION DEVICE DPI 80-PQFP
Manufacturer:
IDT, Integrated Device Technology Inc
Datasheet:
![IDT74FCT162244ATPA](/images/manufacturer_photos/0/3/324/idt__integrated_device_technology_inc_tmb.jpg)
Part Number:
Description:
IDT PART
Manufacturer:
IDT, Integrated Device Technology Inc
Datasheet:
![IDT82P5088BBG](/images/manufacturer_photos/0/3/324/idt__integrated_device_technology_inc_tmb.jpg)
Part Number:
Description:
IC LIU T1/E1/J1 OCTAL 256PBGA
Manufacturer:
IDT, Integrated Device Technology Inc
Datasheet:
![ICS9FG104DGILFT](/photos/6/49/64969/ics9fg104dgilft_tmb.jpg)
Part Number:
Description:
IC FREQ TIMING GENERATOR 28TSSOP
Manufacturer:
IDT, Integrated Device Technology Inc
Datasheet:
![ICS95V857AKLF](/images/manufacturer_photos/0/3/324/idt__integrated_device_technology_inc_tmb.jpg)
Part Number:
Description:
IC CLK DVR PLL 1:10 40VFQFPN
Manufacturer:
IDT, Integrated Device Technology Inc
Datasheet:
![MPC9109AC](/images/manufacturer_photos/0/3/324/idt__integrated_device_technology_inc_tmb.jpg)
Part Number:
Description:
IC CLK FANOUT BUFFER 1:18 32LQFP
Manufacturer:
IDT, Integrated Device Technology Inc
Datasheet:
![MPC940LAC](/images/manufacturer_photos/0/3/324/idt__integrated_device_technology_inc_tmb.jpg)
Part Number:
Description:
IC CLK FANOUT BUFFER 1:18 32LQFP
Manufacturer:
IDT, Integrated Device Technology Inc
Datasheet:
![ICS9LPRS525AGILF](/images/manufacturer_photos/0/3/324/idt__integrated_device_technology_inc_tmb.jpg)
Part Number:
Description:
IC CK505 VREG/RES 56TSSOP
Manufacturer:
IDT, Integrated Device Technology Inc
Datasheet:
![IDTCSPT857CPAG](/photos/6/50/65023/idtcspt857cpag_tmb.jpg)
Part Number:
Description:
IC SDRAM CLK DVR 1:10 48-TSSOP
Manufacturer:
IDT, Integrated Device Technology Inc
Datasheet:
![ICS95V857AGLF](/photos/6/50/65024/ics95v857aglf_tmb.jpg)
Part Number:
Description:
IC CLK DVR PLL 1:10 48TSSOP
Manufacturer:
IDT, Integrated Device Technology Inc
Datasheet:
![IDTCV133PAG](/images/manufacturer_photos/0/3/324/idt__integrated_device_technology_inc_tmb.jpg)
Part Number:
Description:
IC FLEXPC CLK PROGR P4 56-TSSOP
Manufacturer:
IDT, Integrated Device Technology Inc
Datasheet:
![IDTCV115-2PV](/images/manufacturer_photos/0/3/324/idt__integrated_device_technology_inc_tmb.jpg)
Part Number:
Description:
IC FLEXPC CLK PROGR P4 56-TSSOP
Manufacturer:
IDT, Integrated Device Technology Inc
Datasheet:
![IDTCV123PV](/images/manufacturer_photos/0/3/324/idt__integrated_device_technology_inc_tmb.jpg)
Part Number:
Description:
IC FLEXPC CLK PROGR P4 56-SSOP
Manufacturer:
IDT, Integrated Device Technology Inc
Datasheet:
![IDTCSPT855PGG](/photos/31/26/312654/28pin_tssop_ep_tmb.jpg)
Part Number:
Description:
IC PLL CLK DRIVER 2.5V 28-TSSOP
Manufacturer:
IDT, Integrated Device Technology Inc
Datasheet:
![ICS95V847AG](/images/manufacturer_photos/0/3/324/idt__integrated_device_technology_inc_tmb.jpg)
Part Number:
Description:
IC CLOCK DRIVER 2.5V 24-TSSOP
Manufacturer:
IDT, Integrated Device Technology Inc
Datasheet: