ICS1893AF IDT, Integrated Device Technology Inc, ICS1893AF Datasheet - Page 103
ICS1893AF
Manufacturer Part Number
ICS1893AF
Description
PHYCEIVER LOW PWR 3.3V 48-SSOP
Manufacturer
IDT, Integrated Device Technology Inc
Series
PHYceiver™r
Type
PHY Transceiverr
Datasheet
1.ICS1893AFT.pdf
(136 pages)
Specifications of ICS1893AF
Protocol
MII
Voltage - Supply
3.14 V ~ 3.47 V
Mounting Type
Surface Mount
Package / Case
48-SSOP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Drivers/receivers
-
Other names
1893AF
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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Manufacturer:
ICS
Quantity:
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Part Number:
ICS1893AFILF
Manufacturer:
IDT
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ICS1893AF, Rev. D 10/26/04
Table 9-6. PHY Address and LED Pins
P3TD
P4RD
Name
Pin
ICS1893AF Data Sheet - Release
Number
Pin
6
8
Input or
Input or
Output
Output
Type
Pin
Copyright © 2004, Integrated Circuit Systems, Inc.
PHY (Address Bit) 3 / Transmit Data LED.
For more information on this pin, see
As an input pin:
As an output pin:
PHY (Address Bit) 4 / Receive Data LED.
For more information on this pin, see
An an input pin:
As an output pin:
Caution:
Caution:
•
•
•
•
•
•
These multi-function configuration pins are:
– Input pins during either a power-on reset or a hardware reset. In this
– Output pins following reset. In this case, this pin provides indication
This pin establishes the address for the ICS1893AF. When the signal
on one of these pins is logic:
– Low, that address bit is set to logic zero.
– High, that address bit is set to logic one.
When the signal on this pin is:
– De-asserted, this state indicates the ICS1893AF does not have
– Asserted, this state indicates the ICS1893AF has Transmit activity.
This multi-function configuration pin is:
– An input pin during either a power-on reset or a hardware reset. In
– An output pin following reset. In this case, this pin provides activity
This pin establishes the address for the ICS1893AF. When the signal
on this pin is logic:
– Low, that address bit is set to logic zero.
– High, that address bit is set to logic one.
When the signal on this pin is:
– De-asserted, this state indicates the ICS1893AF does not have
– Asserted, this state indicates the ICS1893AF has Receive activity.
case, these pins configure the address of the ICS1893AF PHY
Address Bit 3.
of Transmit activity.
Transmit activity.
this case, this pin configures the ICS1893AF when it is in either
hardware mode or software mode.
status of the ICS1893.
Receive activity.
This pin must not float. (See the notes at
“Multi-Function (Multiplexed) Pins: PHY Address and LED
Pins”.)
All rights reserved.
This pin must not float. (See the notes at
“Multi-Function (Multiplexed) Pins: PHY Address and LED
Pins”.)
103
Chapter 9 Pin Diagram, Listings, and Descriptions
Pin Description
Section 6.5, “Status
Section 6.5, “Status
Section 9.2.2,
Section 9.2.2,
Interface”.
Interface”.
October, 2004