PIC18F2320-I/SP Microchip Technology Inc., PIC18F2320-I/SP Datasheet - Page 36

• Manufacturer Part Number: PIC18F2320-I/SP
• Description: Microcontroller; 8 KB Flash; 512 RAM; 256 EEPROM; 25 I/O; 28-Pin-SPDIP
• Manufacturer: Microchip Technology Inc.

Specifications of PIC18F2320-I/SP

• A/d Inputs: 10-Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 10 MIPS
• Eeprom Memory: 256 Bytes
• Input Output: 25
• Interface: I2C/SPI/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 28-pin SPDIP
• Programmable Memory: 8K Bytes
• Ram Size: 512 Bytes
• Speed: 20 MHz
• Timers: 1-8-bit, 3-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

PIC18F2220/2320/4220/4320
3.3.2
In SEC_IDLE mode, the CPU is disabled but the
peripherals continue to be clocked from the Timer1
oscillator. This mode is entered by setting the IDLEN
bit, modifying to SCS1:SCS0 = 01 and executing a
SLEEP instruction. When the clock source is switched
to the Timer1 oscillator (see Figure 3-5), the primary
oscillator is shut down, the OSTS bit is cleared and the
T1RUN bit is set.
FIGURE 3-5:
FIGURE 3-6:
DS39599C-page 34
T1OSI
OSC1
CPU
Clock
Peripheral
Clock
Program
Counter
Note:
CPU Clock
Note 1: T
Peripheral
PLL Clock
Program
Counter
Output
T1OSI
OSC1
Clock
SEC_IDLE MODE
The Timer1 oscillator should already be
running prior to entering SEC_IDLE mode.
If the T1OSCEN bit is not set when try-
ing to set the SCS0 bit (OSCCON<0>),
the write to SCS0 will not occur. If the
Timer1 oscillator is enabled but not yet
running, peripheral clocks will be delayed
until the oscillator has started; in such sit-
uations, initial oscillator operation is far
from stable and unpredictable operation
may result.
Q1
Wake-up from Interrupt Event
OST
Q2
= 1024 T
PC
Q3
PC
Q4
TIMING TRANSITION FOR ENTRY TO SEC_IDLE MODE
TIMING TRANSITION FOR WAKE FROM SEC_RUN MODE (HSPLL)
OSC
Q1
; T
PLL
Q1
1
T
= 2 ms (approx). These intervals are not shown to scale.
OST
(1)
2
Q2
PC + 2
3
T
Clock Transition
OSTS bit Set
Q3
PLL (1)
4
Q4
5
PC + 2
6
Q1
1
2
7
When a wake-up event occurs, the peripherals continue
to be clocked from the Timer1 oscillator. After a 10 s
delay following the wake-up event, the CPU begins exe-
cuting code, being clocked by the Timer1 oscillator. The
microcontroller operates in SEC_RUN mode until the
primary clock becomes ready. When the primary clock
becomes ready, a clock switch back to the primary clock
occurs (see Figure 3-6). When the clock switch is com-
plete, the T1RUN bit is cleared, the OSTS bit is set and
the primary clock is providing the system clock. The
IDLEN and SCS bits are not affected by the wake-up;
the Timer1 oscillator continues to run.
Clock Transition
3
8
4
5
PC + 4
6
7
8
 2003 Microchip Technology Inc.
Q2
Q3 Q4
Q1
PC + 6
Q2
Q3