PIC18F2320-I/SP Microchip Technology Inc., PIC18F2320-I/SP Datasheet - Page 109

• Manufacturer Part Number: PIC18F2320-I/SP
• Description: Microcontroller; 8 KB Flash; 512 RAM; 256 EEPROM; 25 I/O; 28-Pin-SPDIP
• Manufacturer: Microchip Technology Inc.

Specifications of PIC18F2320-I/SP

• A/d Inputs: 10-Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 10 MIPS
• Eeprom Memory: 256 Bytes
• Input Output: 25
• Interface: I2C/SPI/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 28-pin SPDIP
• Programmable Memory: 8K Bytes
• Ram Size: 512 Bytes
• Speed: 20 MHz
• Timers: 1-8-bit, 3-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

10.3
PORTC is an 8-bit wide, bidirectional port. The corre-
sponding data direction register is TRISC. Setting a
TRISC bit (= 1) will make the corresponding PORTC
pin an input (i.e., put the corresponding output driver in
a High-Impedance mode). Clearing a TRISC bit (= 0)
will make the corresponding PORTC pin an output (i.e.,
put the contents of the output latch on the selected pin).
The Data Latch register (LATC) is also memory
mapped. Read-modify-write operations on the LATC
register read and write the latched output value for
PORTC.
PORTC is multiplexed with several peripheral functions
(Table 10-5). The pins have Schmitt Trigger input buff-
ers. RC1 is normally configured by configuration bit,
CCP2MX (CONFIG3H<0>), as the default peripheral
pin of the CCP2 module (default/erased state,
CCP2MX = 1).
When enabling peripheral functions, care should be
taken in defining TRIS bits for each PORTC pin. Some
peripherals override the TRIS bit to make a pin an output,
while other peripherals override the TRIS bit to make a
pin an input. The user should refer to the corresponding
peripheral section for the correct TRIS bit settings.
FIGURE 10-10:
 2003 Microchip Technology Inc.
PORTC, TRISC and LATC
Registers
Note 1:
2:
3:
PORTC BLOCK DIAGRAM (PERIPHERAL OUTPUT OVERRIDE)
Port/Peripheral Select
Peripheral Data Out
RD LATC
Data Bus
WR LATC or
WR PORTC
WR TRISC
RD TRISC
Peripheral Output
Enable
RD PORTC
Peripheral Data In
I/O pins have diode protection to V
Port/Peripheral Select signal selects between port data (output) and peripheral output.
Peripheral Output Enable is only active if Peripheral Select is active.
(3)
(2)
PIC18F2220/2320/4220/4320
TRIS Latch
Data Latch
D
D
CK
CK
DD
Q
Q
Q
Q
and V
SS
.
The contents of the TRISC register are affected by
peripheral overrides. Reading TRISC always returns
the current contents even though a peripheral device
may be overriding one or more of the pins.
EXAMPLE 10-3:
0
1
CLRF
CLRF
MOVLW
MOVWF
Note:
Q
EN
D
PORTC
LATC
0xCF
TRISC
On a Power-on Reset, these pins are
configured as digital inputs.
V
V
N
P
DD
SS
INITIALIZING PORTC
; Initialize PORTC by
; clearing output
; data latches
; Alternate method
; to clear output
; data latches
; Value used to
; initialize data
; direction
; Set RC<3:0> as inputs
; RC<5:4> as outputs
; RC<7:6> as inputs
I/O pin
Schmitt
Trigger
(1)
DS39599C-page 107