PIC18F2320-I/SP Microchip Technology Inc., PIC18F2320-I/SP Datasheet - Page 108

• Manufacturer Part Number: PIC18F2320-I/SP
• Description: Microcontroller; 8 KB Flash; 512 RAM; 256 EEPROM; 25 I/O; 28-Pin-SPDIP
• Manufacturer: Microchip Technology Inc.

Specifications of PIC18F2320-I/SP

• A/d Inputs: 10-Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 10 MIPS
• Eeprom Memory: 256 Bytes
• Input Output: 25
• Interface: I2C/SPI/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 28-pin SPDIP
• Programmable Memory: 8K Bytes
• Ram Size: 512 Bytes
• Speed: 20 MHz
• Timers: 1-8-bit, 3-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

PIC18F2220/2320/4220/4320
TABLE 10-3:
TABLE 10-4:
DS39599C-page 106
PORTB
LATB
TRISB
INTCON
INTCON2
INTCON3
ADCON1
Legend:
RB0/AN12/INT0
RB1/AN10/INT1
RB2/AN8/INT2
RB3/AN9/CCP2
RB4/AN11/KBI0
RB5/KBI1/PGM
RB6/KBI2/PGC
RB7/KBI3/PGD
Legend: TTL = TTL input, ST = Schmitt Trigger input
Note 1:
Name
2:
3:
4:
5:
Name
x = unknown, u = unchanged, q = value depends on condition. Shaded cells are not used by PORTB.
This buffer is a TTL input when configured as digital I/O.
This buffer is a Schmitt Trigger input when configured as the external interrupt.
This buffer is a Schmitt Trigger input when configured as the CCP2 input.
A device configuration bit selects which I/O pin the CCP2 pin is multiplexed on.
This buffer is a Schmitt Trigger input when used in Serial Programming mode.
LATB Data Latch Register
PORTB Data Direction Register
GIE/GIEH PEIE/GIEL TMR0IE
INT2IP
RBPU
Bit 7
RB7
—
PORTB FUNCTIONS
SUMMARY OF REGISTERS ASSOCIATED WITH PORTB
INTEDG0 INTEDG1 INTEDG2
Bit#
bit 0
bit 1
bit 2
bit 3
bit 4
bit 5
bit 6
bit 7
INT1IP
Bit 6
RB6
—
TTL
TTL
TTL
TTL
TTL/ST
TTL/ST
TTL/ST
VCFG1
Buffer
Bit 5
RB5
(1)
(1)
(1)
(1)
TTL
—
/ST
/ST
/ST
/ST
(5)
(5)
(5)
(2)
(2)
(2)
(3)
VCFG0
INT0IE
INT2IE
Bit 4
RB4
Input/output pin, analog input or external interrupt input 0.
Internal software programmable weak pull-up.
Input/output pin, analog input or external interrupt input 1.
Internal software programmable weak pull-up.
Input/output pin, analog input or external interrupt input 2.
Internal software programmable weak pull-up.
Input/output pin or analog input. Capture2 input/Compare2 output/
PWM output when CCP2MX configuration bit is set
Internal software programmable weak pull-up.
Input/output pin (with interrupt-on-change) or analog input.
Internal software programmable weak pull-up.
Input/output pin (with interrupt-on-change). Internal software
programmable weak pull-up. Low-voltage ICSP enable pin.
Input/output pin (with interrupt-on-change). Internal software
programmable weak pull-up. Serial programming clock.
Input/output pin (with interrupt-on-change). Internal software
programmable weak pull-up. Serial programming data.
PCFG3
INT1IE
RBIE
Bit 3
RB3
—
TMR0IF
TMR0IP
PCFG2
Bit 2
RB2
—
PCFG1
INT0IF
INT2IF
Bit 1
RB1
—
Function
PCFG0
INT1IF
RBIF
RBIP
Bit 0
RB0
 2003 Microchip Technology Inc.
xxxq qqqq
xxxx xxxx
1111 1111
0000 000x
1111 -1-1
11-0 0-00
--00 0000
POR, BOR
Value on
(4)
.
uuuu uuuu
uuuu uuuu
1111 1111
0000 000u
1111 -1-1
11-0 0-00
--00 0000
Value on
all other
Resets