PIC16F785-I/P Microchip Technology Inc., PIC16F785-I/P Datasheet - Page 94
![no-image](/images/manufacturer_photos/0/4/440/microchip_technology_inc__sml.jpg)
PIC16F785-I/P
Manufacturer Part Number
PIC16F785-I/P
Description
MCU, 8-Bit, 2KW Flash, 128 RAM, 18 I/O, DIP-20
Manufacturer
Microchip Technology Inc.
Datasheet
1.PIC16F785-IP.pdf
(184 pages)
Specifications of PIC16F785-I/P
A/d Inputs
12-Channel, 10-Bit
Comparators
2
Cpu Speed
5 MIPS
Eeprom Memory
256 Bytes
Input Output
17
Memory Type
Flash
Number Of Bits
8
Package Type
20-pin PDIP
Programmable Memory
3.5K Bytes
Ram Size
128 Bytes
Speed
20 MHz
Timers
2-8-bit, 1-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part
Electrostatic Device
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PIC16F785/HV785
13.5
The PWM output signal can be made active-high or
active-low by setting or resetting the corresponding
POL bit (see Register 13-3 and Register 13-4). When
POL is ‘1’ the active output state is V
‘0’ the active output state is V
13.6
When the PWM is enabled, the PWM outputs may be
configured for auto-shutdown by setting the PASEN bit
(see Register 13-1). V
C1OUT pin will cause a shutdown event if auto-shut-
down is enabled. An auto-shutdown event immediately
places the PWM outputs in the inactive state (see
Section 13.5 “Active PWM Output Level”) and the
PWM phase and period counters are reset and held to
zero.
FIGURE 13-1:
DS41249D-page 92
C1OUT
C2OUT
Note 1:
F
OSC
Active PWM Output Level
Auto-Shutdown and Auto-Restart
Reset dominant.
BLANK1
PWMPH1<C1EN>
PWMPH1<C2EN>
BLANK2
PWMPH2<C1EN>
PWMPH2<C2EN>
TWO-PHASE PWM SIMPLIFIED BLOCK DIAGRAM
IL
PWMP<1:0>
Prescale
1,2,4,8
on the RA2/AN2/T0CKI/INT/
OH
.
OL
. When POL is
pwm_clk
PWMPH1<4:0>
PWMPH2<4:0>
SHUTDOWN
PWMASE
PASEN
PH1EN
PH2EN
SHUTDOWN
Preliminary
PH1EN
PH2EN
Phase
Counter
5
The PWMASE bit (see Register 13-2) is set by hard-
ware when a shutdown event occurs. If automatic
restarts are not enabled (PRSEN = 0, see
Register 13-1), PWM operation will not resume until the
PWMASE bit is cleared by firmware after the shutdown
condition clears. The PWMASE bit can not be cleared
as long as the shutdown condition exists. If automatic
restarts are not enabled, the auto-shutdown mode can
be forced by writing a ‘1’ to the PWMASE bit.
If automatic restarts are enabled (PRSEN = 1), the
PWMASE bit is automatically cleared and PWM
operation resumes when the auto-shutdown event
clears (V
pwm_count
5
5
Res
PER<4:0>
SHUTDOWN
IH
on the RA2/AN2/T0CKI/INT/C1OUT pin).
5
S
S
R
R
(1)
(1)
Q
Q
pha1
pha2
© 2006 Microchip Technology Inc.
0
1
MASTER
PWMPH2<POL>
PWMPH1<POL>
M
S
RC1/AN5/C12IN1-/PH1
RC4/C2OUT/PH2
RB7/SYNC
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