PIC16F785-I/P Microchip Technology Inc., PIC16F785-I/P Datasheet - Page 79

• Manufacturer Part Number: PIC16F785-I/P
• Description: MCU, 8-Bit, 2KW Flash, 128 RAM, 18 I/O, DIP-20
• Manufacturer: Microchip Technology Inc.

Specifications of PIC16F785-I/P

• A/d Inputs: 12-Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 5 MIPS
• Eeprom Memory: 256 Bytes
• Input Output: 17
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 20-pin PDIP
• Programmable Memory: 3.5K Bytes
• Ram Size: 128 Bytes
• Speed: 20 MHz
• Timers: 2-8-bit, 1-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

11.3
A device Reset forces all registers to their Reset state.
This disables both op amps.
11.4
Common AC and DC performance specifications for
the OPA module:
• Common Mode Voltage Range
• Leakage Current
• Input Offset Voltage
• Open Loop Gain
• Gain Bandwidth Product (GBWP)
Common mode voltage range is the specified voltage
range for the OPA+ and OPA- inputs, for which the OPA
module will perform to within its specifications. The
OPA module is designed to operate with input voltages
between 0 and V
voltages greater than V
beyond the normal operating range.
TABLE 11-1:
© 2006 Microchip Technology Inc.
11Ch
11Dh
91h
93h
86h, 186h TRISB
87h, 187h TRISC
Legend:
Address
Effects of a Reset
OPA Module Performance
OPA1CON
OPA2CON
ANSEL0
ANSEL1
x = unknown, u = unchanged, - = unimplemented, read as ‘0’. Shaded cells are not used for the OPA module.
Name
DD
REGISTERS ASSOCIATED WITH THE OPA MODULE
-1.4V. Behavior for common mode
OPAON
OPAON
TRISC7 TRISC6 TRISC5 TRISC4 TRISC3 TRISC2 TRISC1 TRISC0 1111 1111
TRISB7 TRISB6 TRISB5 TRISB4
ANS7
DD
Bit 7
—
-1.4V, or below 0V, are
ANS6
Bit 6
—
—
—
ANS5
Bit 5
—
—
—
Preliminary
ANS4
Bit 4
—
—
—
ANS11 ANS10
ANS3
Bit 3
—
—
—
Leakage current is a measure of the small source or
sink currents on the OPA+ and OPA- inputs. To mini-
mize the effect of leakage currents, the effective imped-
ances connected to the OPA+ and OPA- inputs should
be kept as small as possible and equal.
Input offset voltage is a measure of the voltage differ-
ence between the OPA+ and OPA- inputs in a closed
loop circuit with the OPA in its linear region. The offset
voltage will appear as a DC offset in the output equal to
the input offset voltage, multiplied by the gain of the
circuit. The input offset voltage is also affected by the
common mode voltage.
Open loop gain is the ratio of the output voltage to the
differential input voltage, (OPA+) - (OPA-). The gain is
greatest at DC and falls off with frequency.
Gain Bandwidth Product or GBWP is the frequency
at which the open loop gain falls off to 0 dB.
11.5
When enabled, the op amps continue to operate and
consume current while the processor is in Sleep mode.
ANS2
Bit 2
—
—
—
PIC16F785/HV785
Effects of Sleep
ANS1
ANS9
Bit 1
—
—
—
ANS0
ANS8
Bit 0
—
—
—
0--- ----
0--- ----
1111 1111
---- 1111
1111 ----
POR, BOR
Value on:
DS41249D-page 77
0--- ----
0--- ----
1111 1111
---- 1111
1111 ----
1111 1111
Value on
all other
Resets