PIC16F785-I/P Microchip Technology Inc., PIC16F785-I/P Datasheet - Page 37

• Manufacturer Part Number: PIC16F785-I/P
• Description: MCU, 8-Bit, 2KW Flash, 128 RAM, 18 I/O, DIP-20
• Manufacturer: Microchip Technology Inc.

Specifications of PIC16F785-I/P

• A/d Inputs: 12-Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 5 MIPS
• Eeprom Memory: 256 Bytes
• Input Output: 17
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 20-pin PDIP
• Programmable Memory: 3.5K Bytes
• Ram Size: 128 Bytes
• Speed: 20 MHz
• Timers: 2-8-bit, 1-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

4.0
There are seventeen general purpose I/O pins and one
input only pin available. Depending on which peripher-
als are enabled, some or all of the pins may not be
available as general purpose I/O. In general, when a
peripheral is enabled, the associated pin may not be
used as a general purpose I/O pin.
4.1
PORTA is a 6-bit wide, bidirectional port. The corre-
sponding data direction register is TRISA (Register 4-2).
Setting a TRISA bit (= 1) will make the corresponding
PORTA pin an input (i.e., put the corresponding output
driver in a High-Impedance mode). Clearing a TRISA bit
(= 0) will make the corresponding PORTA pin an output
(i.e., put the contents of the output latch on the selected
pin). The exception is RA3, which is input only and its
TRIS bit will always read as ‘1’. Example 4-1 shows how
to initialize PORTA.
Reading the PORTA register (Register 4-1) reads the
status of the pins, whereas writing to it will write to the
port latch. All write operations are read-modify-write
operations. Therefore, a write to a port implies that the
port pins are read; this value is modified and then
written to the port data latch. RA3 reads ‘0’ when
MCLRE = 1.
REGISTER 4-1:
© 2006 Microchip Technology Inc.
Note:
I/O PORTS
PORTA and TRISA Registers
bit 7-6
bit 5-0
Additional information on I/O ports may be
found in the “PICmicro
Family Reference Manual” (DS33023).
PORTA: PORTA REGISTER (ADDRESS: 05h, 105h)
bit 7
Unimplemented: Read as ‘0’
RA<5:0>: PORTA I/O Pin bits
1 = Port pin is greater than V
0 = Port pin is less than V
Legend:
R = Readable bit
-n = Value at POR
Note 1: Data latches are unknown after a POR, but each port bit reads ‘0’ when the
U-0
—
®
corresponding analog select bit is ‘1’ (see Register 12-1).
Mid-Range MCU
U-0
—
R/W-x
IL
RA5
Preliminary
W = Writable bit
‘1’ = Bit is set
IH
R/W-x
RA4
The TRISA register controls the direction of the
PORTA pins, even when they are being used as analog
inputs. The user must ensure the bits in the TRISA
register are maintained set when using them as analog
inputs. I/O pins configured as analog inputs always
read ‘0’.
When RA1 is configured as a voltage reference output,
the RA1 digital output driver will automatically be
disabled while not affecting the TRISA<1> value.
EXAMPLE 4-1:
BCF
BCF
CLRF
MOVLW
ANDWF
BSF
MOVLW
MOVWF
BCF
(1)
Note:
PIC16F785/HV785
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-x
STATUS,RP0
STATUS,RP1
PORTA
F8h
ANSEL0,f
STATUS,RP0
0Ch
TRISA
STATUS,RP0
RA3
The ANSEL0 (91h) register must be initial-
ized to configure an analog channel as a
digital input. Pins configured as analog
inputs will read ‘0’.
R/W-x
INITIALIZING PORTA
RA2
;Bank 0
;
;Init PORTA
;Set RA<2:0> to
; digital I/O
;Bank 1
;Set RA<3:2> as inputs
; and set RA<5:4,1:0>
; as outputs
;Bank 0
(1)
x = Bit is unknown
R/W-x
RA1
DS41249D-page 35
(1)
R/W-x
RA0
bit 0
(1)