PIC16F785-I/P Microchip Technology Inc., PIC16F785-I/P Datasheet - Page 17

• Manufacturer Part Number: PIC16F785-I/P
• Description: MCU, 8-Bit, 2KW Flash, 128 RAM, 18 I/O, DIP-20
• Manufacturer: Microchip Technology Inc.

Specifications of PIC16F785-I/P

• A/d Inputs: 12-Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 5 MIPS
• Eeprom Memory: 256 Bytes
• Input Output: 17
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 20-pin PDIP
• Programmable Memory: 3.5K Bytes
• Ram Size: 128 Bytes
• Speed: 20 MHz
• Timers: 2-8-bit, 1-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

2.2.2.1
The STATUS register contains arithmetic status of the
ALU, the Reset status and the bank select bits for data
memory (SRAM).
The STATUS register can be the destination for any
instruction, like any other register. If the STATUS
register is the destination for an instruction that affects
the Z, DC or C bits, then the write to these three bits is
disabled. These bits are set or cleared according to the
device logic. Furthermore, the TO and PD bits are not
writable. Therefore, the result of an instruction with the
STATUS register as destination may be different than
intended.
REGISTER 2-1:
© 2006 Microchip Technology Inc.
bit 7
bit 6-5
bit 4
bit 3
bit 2
bit 1
bit 0
STATUS Register
STATUS: STATUS REGISTER (ADDRESS: 03h, 83h, 103h OR 183h)
bit 7
IRP: Register Bank Select bit (used for Indirect addressing)
1 = Bank 2,3 (100h-1FFh)
0 = Bank 0,1 (00h-FFh)
RP<1:0>: Register Bank Select bits (used for Direct addressing)
11 = Bank 3 (180h-1FFh)
10 = Bank 2 (100h-17Fh)
01 = Bank 1 (80h-FFh)
00 = Bank 0 (00h-7Fh)
TO: Time-out bit
1 = After power-up, CLRWDT instruction, or SLEEP instruction
0 = A WDT time-out occurred
PD: Power-down bit
1 = After power-up or by the CLRWDT instruction
0 = By execution of the SLEEP instruction
Z: Zero bit
1 = The result of an arithmetic or logic operation is zero
0 = The result of an arithmetic or logic operation is not zero
DC: Digit Carry/Borrow bit (ADDWF, ADDLW,SUBLW,SUBWF instructions)
For borrow, the polarity is reversed.
1 = A carry-out from the 4th low-order bit of the result occurred
0 = No carry-out from the 4th low-order bit of the result
C: Carry/Borrow bit (ADDWF, ADDLW, SUBLW, SUBWF instructions)
1 = A carry-out from the Most Significant bit of the result occurred
0 = No carry-out from the Most Significant bit of the result occurred
Legend:
R = Readable bit
-n = Value at POR
R/W-0
Note 1: For Borrow, the polarity is reversed. A subtraction is executed by adding the two’s
IRP
complement of the second operand. For rotate (RRF, RLF) instructions, this bit is
loaded with either the high-order or low-order bit of the source register.
R/W-0
RP1
R/W-0
RP0
Preliminary
W = Writable bit
‘1’ = Bit is set
R-1
TO
For example, CLRF STATUS will clear the upper three
bits and set the Z bit. This leaves the STATUS register
as 000u u1uu (where u = unchanged).
It is recommended, therefore, that only BCF, BSF,
SWAPF and MOVWF instructions are used to alter the
STATUS register, because these instructions do not
affect any Status bits. For other instructions not
affecting
“Instruction Set Summary”.
Note:
PIC16F785/HV785
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R-1
PD
any
The C and DC bits operate as a Borrow
and Digit Borrow out bit, respectively, in
subtraction. See the SUBLW and SUBWF
instructions for examples.
Status
R/W-x
Z
bits,
(1)
(1)
x = Bit is unknown
R/W-x
DC
see
DS41249D-page 15
(1)
Section 17.0
R/W-x
C
(1)
bit 0