PIC17C756A-33/L Microchip Technology Inc., PIC17C756A-33/L Datasheet - Page 42

• Manufacturer Part Number: PIC17C756A-33/L
• Description: 68 PIN, 32 KB OTP, 902 RAM, 50 I/O
• Manufacturer: Microchip Technology Inc.

Specifications of PIC17C756A-33/L

• A/d Inputs: 12-Channel, 10-Bit
• Cpu Speed: 8.25 MIPS
• Eeprom Memory: 0 Bytes
• Input Output: 52
• Interface: I2C/SPI/USART
• Memory Type: OTP
• Number Of Bits: 8
• Package Type: 68-pin PLCC
• Programmable Memory: 32K Bytes
• Ram Size: 902 Bytes
• Speed: 16 MHz
• Timers: 2-8-bit, 2-16-bit
• Voltage, Range: 3-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part

PIC17C7XX
EXAMPLE 6-2:
DS30289B-page 42
; The addresses that are used to store the CPUSTA and WREG values must be in the data memory
; address range of 1Ah - 1Fh. Up to 6 locations can be saved and restored using the MOVFP
; instruction. This instruction neither affects the status bits, nor corrupts the WREG register.
; This routine uses the FRS0, so it controls the FS1 and FS0 bits in the ALUSTA register.
;
Nobank_FSR
Bank_FSR
ALU_Temp
WREG_TEMP
BSR_S1
BSR_S2
BSR_S3
BSR_S4
BSR_S5
BSR_S6
;
INITIALIZATION
;
INIT_POINTERS
PUSH
POP
;
CALL
CLRF
CLRF
BSF
CLRF
MOVLW
MOVWF
MOVWF
MOVLW
MOVWF
:
:
:
:
BSF
BCF
MOVFP
CLRF
MOVPF
MOVPF
MOVPF
MOVFP
MOVFP
MOVFP
MOVFP
MOVPF
MOVFP
;
:
;
CLRF
MOVFP
DECF
MOVFP
MOVFP
BSF
MOVPF
MOVPF
DECF
MOVFP
MOVFP
MOVFP
RETFIE
EQU
EQU
EQU
EQU
EQU
EQU
EQU
EQU
EQU
EQU
CLEAR_RAM
BSR, F
ALUSTA, F
ALUSTA, FS1
WREG, F
BSR_S1
FSR0
Nobank_FSR
0x20
Bank_FSR
ALUSTA, FS0
ALUSTA, FS1
BSR, INDF0
BSR, F
ALUSTA, ALU_Temp
FSR0, Nobank_FSR
WREG, WREG_TEMP
Bank_FSR, FSR0
ALU_Temp, INDF0
WREG_TEMP, INDF0
PCLATH, INDF0
FSR0, Bank_FSR
Nobank_FSR, FSR0
ALUSTA, F
Bank_FSR, FSR0
FSR0, F
INDF0, PCLATH
INDF0, WREG
ALUSTA, FS1
INDF0, ALU_Temp
FSR0, Bank_FSR
Nobank_FSR, F
Nobank_FSR, FSR0
ALU_Temp, ALUSTA
INDF0, BSR
SAVING STATUS AND WREG IN RAM (NESTED)
0x40
0x41
0x42
0x43
0x01A
0x01B
0x01C
0x01D
0x01E
0x01F
; 1st location to save BSR
; 2nd location to save BSR (Label Not used in program)
; 3rd location to save BSR (Label Not used in program)
; 4th location to save BSR (Label Not used in program)
; 5th location to save BSR (Label Not used in program)
; 6th location to save BSR (Label Not used in program)
;
; Must Clear all Data RAM
; Must Initialize the pointers for POP and PUSH
; Set All banks to 0
; FSR0 post increment
; Clear WREG
; Load FSR0 with 1st address to save BSR
; Your code
; At Interrupt Vector Address
; FSR0 has auto-increment, does not affect status bits
; does not affect status bits
; No Status bits are affected
; Peripheral and Data RAM Bank 0 No Status bits are affected
;
; Save the FSR for BSR values
;
; Restore FSR value for other values
; Push ALUSTA value
; Push WREG value
; Push PCLATH value
; Restore FSR value for other values
;
; Interrupt Service Routine (ISR) code
; FSR0 has auto-decrement, does not affect status bits
; Restore FSR value for other values
;
; Pop PCLATH value
; Pop WREG value
; FSR0 does not change
; Pop ALUSTA value
; Restore FSR value for other values
;
; Save the FSR for BSR values
;
; No Status bits are affected
; Return from interrupt (enable interrupts)
2000 Microchip Technology Inc.