PIC18F4550-I/P Microchip Technology Inc., PIC18F4550-I/P Datasheet - Page 281

• Manufacturer Part Number: PIC18F4550-I/P
• Description: 40 PIN, 32 KB FLASH, 2048 RAM, FS-USB 2.0
• Manufacturer: Microchip Technology Inc.

Specifications of PIC18F4550-I/P

• A/d Inputs: 13-Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 12 MIPS
• Eeprom Memory: 256 Bytes
• Input Output: 34
• Interface: I2C/SPI/UART/USART/USB
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 40-pin PDIP
• Programmable Memory: 32K Bytes
• Ram Size: 2K Bytes
• Speed: 48 MHz
• Timers: 1-8-bit, 3-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

24.0
PIC18F2455/2550/4455/4550
High/Low-Voltage Detect module (HLVD). This is a pro-
grammable circuit that allows the user to specify both a
device voltage trip point and the direction of change
from that point. If the device experiences an excursion
past the trip point in that direction, an interrupt flag is
set. If the interrupt is enabled, the program execution
will branch to the interrupt vector address and the
software can then respond to the interrupt.
REGISTER 24-1:
© 2006 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5
bit 4
bit 3-0
Note 1:
VDIRMAG
R/W-0
HIGH/LOW-VOLTAGE DETECT
(HLVD)
See Table 28-6 in Section 28.0 “Electrical Characteristics” for specifications.
VDIRMAG: Voltage Direction Magnitude Select bit
1 = Event occurs when voltage equals or exceeds trip point (HLVDL3:HLDVL0)
0 = Event occurs when voltage equals or falls below trip point (HLVDL3:HLVDL0)
Unimplemented: Read as ‘0’
IRVST: Internal Reference Voltage Stable Flag bit
1 = Indicates that the voltage detect logic will generate the interrupt flag at the specified voltage range
0 = Indicates that the voltage detect logic will not generate the interrupt flag at the specified voltage
HLVDEN: High/Low-Voltage Detect Power Enable bit
1 = HLVD enabled
0 = HLVD disabled
HLVDL3:HLVDL0: Voltage Detection Limit bits
1111 = External analog input is used (input comes from the HLVDIN pin)
1110 = Maximum setting
.
.
.
0000 = Minimum setting
range and the HLVD interrupt should not be enabled
U-0
—
HLVDCON: HIGH/LOW-VOLTAGE DETECT CONTROL REGISTER
W = Writable bit
‘1’ = Bit is set
devices
IRVST
R-0
PIC18F2455/2550/4455/4550
have
HLVDEN
R/W-0
Preliminary
a
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
HLVDL3
R/W-0
(1)
The
(Register 24-1) completely controls the operation of the
HLVD module. This allows the circuitry to be “turned
off” by the user under software control which minimizes
the current consumption for the device.
The block diagram for the HLVD module is shown in
Figure 24-1.
(1)
High/Low-Voltage
HLVDL2
R/W-1
(1)
x = Bit is unknown
Detect
HLVDL1
R/W-0
DS39632C-page 279
(1)
Control
HLVDL0
R/W-1
register
bit 0
(1)