PIC18F4550-I/P Microchip Technology Inc., PIC18F4550-I/P Datasheet - Page 150

• Manufacturer Part Number: PIC18F4550-I/P
• Description: 40 PIN, 32 KB FLASH, 2048 RAM, FS-USB 2.0
• Manufacturer: Microchip Technology Inc.

Specifications of PIC18F4550-I/P

• A/d Inputs: 13-Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 12 MIPS
• Eeprom Memory: 256 Bytes
• Input Output: 34
• Interface: I2C/SPI/UART/USART/USB
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 40-pin PDIP
• Programmable Memory: 32K Bytes
• Ram Size: 2K Bytes
• Speed: 48 MHz
• Timers: 1-8-bit, 3-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

PIC18F2455/2550/4455/4550
TABLE 15-5:
DS39632C-page 148
INTCON
RCON
PIR1
PIE1
IPR1
TRISB
TRISC
TMR2
PR2
T2CON
CCPR1L
CCPR1H
CCP1CON
CCPR2L
CCPR2H
CCP2CON
ECCP1AS
ECCP1DEL
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used by PWM or Timer2.
Note 1:
Name
2:
The SBOREN bit is only available when BOREN<1:0> = 01; otherwise, the bit reads as ‘0’.
These bits are unimplemented on 28-pin devices; always maintain these bits clear.
Timer2 Register
Timer2 Period Register
Capture/Compare/PWM Register 1 Low Byte
Capture/Compare/PWM Register 1 High Byte
Capture/Compare/PWM Register 2 Low Byte
Capture/Compare/PWM Register 2 High Byte
ECCPASE ECCPAS2 ECCPAS1 ECCPAS0
GIE/GIEH PEIE/GIEL
SPPIE
SPPIP
SPPIF
TRISC7
P1M1
TRISB7
PRSEN
IPEN
Bit 7
—
—
REGISTERS ASSOCIATED WITH PWM AND TIMER2
(2)
(2)
(2)
(2)
SBOREN
T2OUTPS3 T2OUTPS2 T2OUTPS1 T2OUTPS0 TMR2ON T2CKPS1 T2CKPS0
TRISC6
P1M0
PDC6
TRISB6
ADIE
ADIP
ADIF
Bit 6
—
(2)
(2)
(1)
TMR0IE
PDC5
TRISB5
DC1B1
DC2B1
RCIF
RCIE
RCIP
Bit 5
—
—
(2)
Preliminary
PDC4
TRISB4
INT0IE
DC1B0
DC2B0
Bit 4
TXIF
TXIE
TXIP
RI
—
(2)
CCP1M3
CCP2M3
PSSAC1
PDC3
TRISB3
SSPIF
SSPIE
SSPIP
RBIE
Bit 3
TO
—
(2)
CCP1M2
CCP2M2
PSSAC0 PSSBD1
TMR0IF
CCP1IE
CCP1IP
PDC2
CCP1IF
TRISB2
TRISC2
Bit 2
PD
(2)
© 2006 Microchip Technology Inc.
CCP1M1
CCP2M1
TMR2IE
TMR2IP
PDC1
TMR2IF
TRISB1
TRISC1
INT0IF
Bit 1
POR
(2)
(2)
PSSBD0
CCP1M0
CCP2M0
TMR1IE
TMR1IP
TMR1IF
TRISB0
TRISC0
PDC0
Bit 0
RBIF
BOR
(2)
(2)
on page
Values
Reset
51
52
54
54
54
54
54
52
52
52
53
53
53
53
53
53
53
53